Multilayer CMOS device fabricated on laser recrystallized silicon islands

Akiyama, S.; Ogawa, S.; Yoneda, Masahiro; Yoshii, N.; Terui, Y.

doi:10.1109/iedm.1983.190514

Cited by 21 publications

(8 citation statements)

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“…A silicon heat sink layer can alleviate this problem [22]. The silicon layer thickness is more than the absorption length for the used wavelength, in particular at higher temperatures.…”

Section: A Laser Treatment Of A-si Filmsmentioning

confidence: 99%

Low-Temperature Fabricated TFTs on Polysilicon Stripes

Brunets

Holleman

Kovalgin

et al. 2009

IEEE Trans. Electron Devices

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Abstract-This paper presents a novel approach to make highperformance CMOS at low temperatures. Fully functional devices are manufactured using back-end compatible substrate temperatures after the deposition of the amorphous-silicon starting material. The amorphous silicon is pretextured to control the location of grain boundaries. Green-laser annealing is employed for crystallization and dopant activation.

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“…A silicon heat sink layer can alleviate this problem [22]. The silicon layer thickness is more than the absorption length for the used wavelength, in particular at higher temperatures.…”

Section: A Laser Treatment Of A-si Filmsmentioning

confidence: 99%

Low-Temperature Fabricated TFTs on Polysilicon Stripes

Brunets

Holleman

Kovalgin

et al. 2009

IEEE Trans. Electron Devices

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“…This paper examines the problem from several points of view and tries to answer three fundamental ques tions: (1) What are the main advantages of 3-D circuitry? (2) What kind of circuits will yield best advantages?…”

Section: Introductionmentioning

confidence: 99%

Purposes of three-dimensional circuits

Terao

Wiele

1987

IEEE Circuits Devices Mag.

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“…The major drawback of these circuits, however, is the inability to produce high-quality devices, specifically on the upper planes [41], [43]. In addition, the growth of the devices on the upper planes usually requires high temperatures.…”

Section: Introductionmentioning

confidence: 99%

“…For the devices on the upper planes, however, different fabrication methods are required. Several techniques, based on laser recrystallization [41] or seed crystallization [42], are used to produce CMOS or SOI devices on the upper planes.…”

Section: Introductionmentioning

confidence: 99%