Multigate Buckled Self-Aligned Dual Si Nanowire MOSFETs on Bulk Si for High Electron Mobility

Abstract

Abstract-In this paper, we report for the first time making multi-gate buckled self-aligned dual Si nanowires including two sub-100 nm cross-sectional cores on bulk Si substrate using optical lithography, hard mask/spacer technology, and local oxidation. ≈0.8 GPa uniaxial tensile stress was measured on the buckled dual nanowires using micro-Raman spectroscopy. The buckled multigate dual Si nanowires show excellent electrical characteristics, e.g., 62 mV/decade and 42% low-field electron mobility enhancement due to uniaxial tensile stress in comparison to the non-strained device, all at V D S = 50 mV and 293 K.Index Terms-Local oxidation, local stressor, micro-Raman spectroscopy, MOSFET, multi-gate, Si nanowire, strain engineering, uniaxial tensile stress.

Empirical Model for the Effective Electron Mobility in Silicon Nanowires

“…However, experimental NWs are frequently doped and the mobility can strongly be reduced due to scattering on ionized impurities. The large experimental mobilities for 110 SiNWs with d NW >10 nm, on the other hand, can be explained by strain effects [32], [39], [45], [46], which have not been accounted for in our model. Nevertheless, the model in its present form can be used as a reference for benchmarking SiNW technologies.…”