Multi-Level Cu Interconnects Integration and Characterization with Air Gap as Ultra-Low K Material Formed using a Hybrid Sacrificial Oxide / Polymer Stack

Gosset, L.G.; Gaillard, F.; Bouchu, D.; Gras, R.; Pontcharra, J. de; Orain, S.; Cueto, O.; Lyan, Ph.; Louveau, O.; Passemard, G.; Torrès, J.

doi:10.1109/iitc.2007.382348

Cited by 11 publications

(7 citation statements)

References 1 publication

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“…Air cavities can also be formed by removing sacrificial material by wet etching (107). A SiC capping layer was used to protect the surface of the IC.…”

Section: Air Isolationmentioning

confidence: 99%

Low–Dielectric Constant Insulators for Future Integrated Circuits and Packages

Kohl

2011

Annu. Rev. Chem. Biomol. Eng.

111

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Future integrated circuits and packages will require extraordinary dielectric materials for interconnects to allow transistor advances to be translated into system-level advances. Exceedingly low-permittivity and low-loss materials are required at every level of the electronic system, from chip-level insulators to packages and printed wiring boards. In this review, the requirements and goals for future insulators are discussed followed by a summary of current state-of-the-art materials and technical approaches. Much work needs to be done for insulating materials and structures to meet future needs.

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“…Air cavities can also be formed by removing sacrificial material by wet etching (107). A SiC capping layer was used to protect the surface of the IC.…”

Section: Air Isolationmentioning

confidence: 99%

Low–Dielectric Constant Insulators for Future Integrated Circuits and Packages

Kohl

2011

Annu. Rev. Chem. Biomol. Eng.

111

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“…The ultimate solution for a low k-value is the exclusion of all materials from the IMD, which is called an air gap (AG). There are two types of AG processes: (1) removal of the sacrificial material via thermal decomposition or chemical treatment [6][7][8][9][10] through the upper dielectric layer and (2) etching back the IMD followed by pinch-off of the next IMD deposition [11][12][13][14][15]. In the latter case, the AG can be formed selectively at the critical path, leaving dielectric materials in other places, which can retain the mechanical strength.…”

Section: Introductionmentioning

confidence: 99%

Timing Criticality-Aware Design Optimization Using BEOL Air Gap Technology on Consecutive Metal Layers

2019

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Air-gap (AG) technology on back-end-of-line (BEOL) provides a means to improve performance without area or power degradation. However, the “blind” use of AG based on traditional design methodologies does not provide sufficient performance gain. We developed an AG-aware design methodology to maximize performance gain with minimum cost. The experimental results of the proposed methodology, which was tested using a 10 nm Advanced RISC Machine (ARM) Cortex-A9 quad-core central processing unit (CPU), indicated a performance gain of 6.1–8.4% compared with traditional AG design. The performance gain achieved represents about half of the 10–15% performance improvement under the same power by a process node shrink. A Si process of consecutive double AG layers was developed by overcoming various process challenges, such as AG depth control, Cu/ultra-low-k damage, the hermetic AG liner, and step-height control above the AG. Furthermore, the capacitance was reduced by 17.0%, which satisfied the target goal in the simulation stage for the assumed structure. The optimized integration process was validated according to the function yield of the CPU, which was comparable to that of a non-AG process. The time-dependent dielectric breakdown and electromigration lifetime of the AG wire satisfied the 10-year criteria, and the assembly yield was verified.

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“…The selective removal of a placeholder material can be achieved by thermal decomposition of a sacrificial polymer 3,4 or by wet etching. 5 In this study, an improvement in the thermally decomposable sacrificial polymer, used as a placeholder to fabricate air-gaps in the IMD layer, is described.…”

Section: Introductionmentioning

confidence: 99%

Air-Gaps for High-Performance On-Chip Interconnect Part I: Improvement in Thermally Decomposable Template

Park

Allen

Kohl

2008

Journal of Elec Materi

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The incorporation of air-cavities (i.e., air-gaps) as the intralevel dielectric in integrated circuits (ICs) can provide an ultralow-k solution, especially at the 32 nm technology node and beyond. Air-gaps can be created by the templating method using norbornene (NB)-based sacrificial polymers. However, it has been found that the hardness and modulus of the templating material is critical to achieving mechanical fidelity of the structure during processing. As a result, stiffer sacrificial polymers lead to higher yield. In this study, tetracyclododecene (TD)-based sacrificial polymers were investigated and compared with norbornene-based (NB)-based polymers. Nanoindentation experiments showed that thin films of TD-based sacrificial polymers were harder than NB-based sacrificial polymers. The effect of the modulus and hardness on the process repeatability was quantitatively evaluated by comparing the straightness of 50-nm-wide lines of TD-and NB-based sacrificial polymers. It was shown that the TD-based polymer structures were straighter and had better reproducibility than those of NB-based polymers due to an increase in hardness and modulus. The thermal decomposition properties of TD-based polymers were similar to their NB-based counterparts. Both TD-and NB-based polymers were thermally stable at 300°C and the decomposition residues were less than 1% of the original weight. The thickness of the residue (solid reaction byproducts) from thin TD films was as low as 2.1 nm (depending on the atmosphere quality) and the residue was hydrophobic.

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Multi-Level Cu Interconnects Integration and Characterization with Air Gap as Ultra-Low K Material Formed using a Hybrid Sacrificial Oxide / Polymer Stack

Cited by 11 publications

References 1 publication

Low–Dielectric Constant Insulators for Future Integrated Circuits and Packages

Low–Dielectric Constant Insulators for Future Integrated Circuits and Packages

Timing Criticality-Aware Design Optimization Using BEOL Air Gap Technology on Consecutive Metal Layers

Air-Gaps for High-Performance On-Chip Interconnect Part I: Improvement in Thermally Decomposable Template

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