1991
DOI: 10.1109/49.87633
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Multi-Gb/s silicon bipolar clock recovery IC

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Cited by 17 publications
(2 citation statements)
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“…To compare the clock quality of the conventional data recovered clock and our proposed distributed clock approach, we measure the phase noise of the clock component of the modulated signals and the distributed clock. Due to the availability of a 25GHz CDR, we estimate the recovered clock phase noise by extracting clock component from the data using a 50-MHz-bandwidth narrowband cavity filter [11] and PRBS2 7 -1. This ensures only one clock tone falls into the filter bandwidth and provides a good approximation of a CDR.…”
Section: Resultsmentioning
confidence: 99%
“…To compare the clock quality of the conventional data recovered clock and our proposed distributed clock approach, we measure the phase noise of the clock component of the modulated signals and the distributed clock. Due to the availability of a 25GHz CDR, we estimate the recovered clock phase noise by extracting clock component from the data using a 50-MHz-bandwidth narrowband cavity filter [11] and PRBS2 7 -1. This ensures only one clock tone falls into the filter bandwidth and provides a good approximation of a CDR.…”
Section: Resultsmentioning
confidence: 99%
“…The differentiator was implemented with a differential pair with its emitters connected by BE and BC junction capacitors. 22 The capacitance was adjustable, with an externally applied reverse bias. Its operation was measured to be insensitive to the applied voltage.…”
Section: Clock and Data Regeneratormentioning
confidence: 99%