Multi-domain compact modeling for GeSbTe-based memory and selector devices and simulation for large-scale 3-D cross-point memory arrays

Phase Change Memory Cell With Reconfigured Electrode for Lower RESET Voltage

“…Along with the shrinking feature size of the PCM cell, especially in consistency with the down-scaling CMOS integration, more and more prominent reduction of the RESET voltage for the OTS-based 1S1R architecture is expectable. For the proof-of-concept demonstration and comparisons, both models are defined referring to the similar-sized OTS-based PCM device reported in [22]. As a result, our scheme with the reconfigured electrode for the cross-point PCM cell is potentially applicable for future PCRAM integration upon the increasingly stringent performance requirements, e.g., leakage current, power consumption etc., due to its consistency and compatibility with the down scaling CMOS process.…”

“…Instead of optimizing the OTS part and its threshold behavior, the 1R part is structurally reconfigured here. Differing from a current scheme that covers the 1R region of the phase change materials [22], [23] using a planar electrode layer above, our scheme rearranges the middle electrode to enwrap the 1R region, shown in Fig. 1(b).…”

Increasing Trapped Carrier Density in Nanoscale GeSeAs Films by As Ion Implantation for Selector Devices in 3D-Stacking Memory

“…Emerging nonvolatile memories such as phase change memory (PCM) and resistive random access memory (RRAM) are the promising candidates in next-generation memory technology. − With scaling down of devices, the storage density reaches a bottleneck due to the reliability and scalability. To further improve the storage density, 3D-stacking has attracted much attention as a feasible solution. − Si-based selector devices including transistors and diodes are incompatible with 3D integration. Therefore, new materials and device structures are studied to realize a high-performance switching device − that is capable of supplying high current to operate the memory element as well as reducing the leakage current for crossbar memory array applications.…”

Surface-Tensile-Stress Induced Polishing-Voids Suppression via H2O2Oxidizer Effect in Cross-Point Phase-Change-Memory-Cells

“…Recently, 3D cross-point memory fabricated with chalcogenidealloy based PCM-cells and chalcogenide based non-linear-selectors [1][2][3][4] has been proposed as a storage class memory having a nonvolatile memory characteristic, a fast operation speed (i.e., several hundred of ns), 5 a good write/erase endurance cycle (i.e., >1 × 10 8 ), and a high integration density (i.e., several Mega-bit). [6][7][8][9][10][11][12][13] 3D cross-point memory-cells have been fabricated by using the structure of confined memory-cells to minimize reset current of PCM cells, 7,8,11,14,15 where chalcogenide-alloy based PCM-material (i.e., Ge x Sb y Te z or Ge or N 2 doped SbTe etc.)…”