2013
DOI: 10.1016/j.mee.2013.03.109
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MOSFET layout modifications for hump effect removal

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“…The hump occurs due to the existence of parasitic channels. Abnormal humps have been reported in metal-oxide-semiconductor field-effect transistors (MOSFETs), silicon-on-glass (SiOG) TFTs and low temperature polysilicon (LTPS) TFTs [20]- [22]. Normally, the positive bias stress (PBS) leads to the positive threshold voltage (V t ) shift by trapping electron into gate insulator.…”
Section: Introductionmentioning
confidence: 99%
“…The hump occurs due to the existence of parasitic channels. Abnormal humps have been reported in metal-oxide-semiconductor field-effect transistors (MOSFETs), silicon-on-glass (SiOG) TFTs and low temperature polysilicon (LTPS) TFTs [20]- [22]. Normally, the positive bias stress (PBS) leads to the positive threshold voltage (V t ) shift by trapping electron into gate insulator.…”
Section: Introductionmentioning
confidence: 99%