“…The methods of reducing the nonlinearity of the varactor includes, combining a discrete digital-switching capacitor bank and MOS varactor for coarse and fine frequency tuning, which requires additional calibration time [2]; connecting a varactor bank with different bias voltage in parallel to get an equalized K VCO , which needs an additional bias circuit [3,4,5]; adopting a new varactor device with the n-type and p-type mixed-doping gates with a special process [6,7]. In this paper, a simple but efficient gain linearized varactor is proposed, consisting of the gate-bulk capacitance (C GB ) of an AMOS and PMOS.…”