2023
DOI: 10.1002/admi.202202426
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MoS2 Synthesized by Atomic Layer Deposition as Cu Diffusion Barrier

Abstract: Miniaturization in integrated circuits requires that the Cu diffusion barriers located in interconnects between the Cu metal line and the dielectric material should scale down. Replacing the conventional TaN with a 2D transition metal dichalcogenide barrier potentially offers the opportunity to scale to 1–2 nm thick barriers. In this article, it is demonstrated that MoS2 synthesized by atomic layer deposition (ALD) can be employed as a Cu diffusion barrier. ALD offers a controlled growth process at back‐end‐of… Show more

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Cited by 4 publications
(2 citation statements)
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“…The summary of different materials, lifetime improvement, and prediction at low field is listed in Table . Furthermore, compared to previous studies utilizing 2D materials as diffusion barriers, , we also demonstrate a significant improvement in the device reliability. This verifies that MW-PES can be considered an effective BEOL-compatible process.…”
Section: Resultssupporting
confidence: 53%
“…The summary of different materials, lifetime improvement, and prediction at low field is listed in Table . Furthermore, compared to previous studies utilizing 2D materials as diffusion barriers, , we also demonstrate a significant improvement in the device reliability. This verifies that MW-PES can be considered an effective BEOL-compatible process.…”
Section: Resultssupporting
confidence: 53%
“…Therefore, current research focuses on using 2D materials as complementary technologies to Cu interconnects, aiming to improve performance and provide alternative pathways for further miniaturization of interconnect technology. Materials such as graphene [1037], MoS2 [1038,1039], TaS2 [1034,1040], and WS2 [1041] can serve as alternatives to traditional diffusion barriers of Cu interconnects, acting as barrier/liner structures to enhance reliability and ensure low resistance.…”
Section: Heterogeneous Integration With Siliconmentioning
confidence: 99%