Monolithic Thin Wafer Stacking Using Low Temperture Direct Bonding

Burggraf, Jurgen; Bravin, Julian; Wiesbauer, Harald; Dragoi, Viorel

doi:10.1149/06405.0095ecst

Cited by 4 publications

(1 citation statement)

References 6 publications

(7 reference statements)

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“…A novel low temperature wafer bonding technology was recently developed [5] and demonstrated for the monolithic integration of two 10 µm thick silicon layers onto a standard 775 µm thick Si wafer [6]. The introduction of such a CMOS-compatible wafer bonding process is of great interest for the development of pixel detectors.…”

Section: Jinst 11 P08016mentioning

confidence: 99%

Principle and modelling of Transient Current Technique for interface traps characterization in monolithic pixel detectors obtained by CMOS-compatible wafer bonding

et al. 2016

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In the framework of monolithic silicon radiation detectors, a fabrication process based on a recently developed silicon wafer bonding technique at low temperature was proposed. Ideally, this new process would enable direct bonding of a read-out electronic chip wafer on a highly resistive silicon substrate wafer, which is expected to present many advantages since it would combine high performance IC's with high sensitive ultra-low doped bulk silicon detectors. But electrical properties of the bonded interface are critical for this kind of application since the mobile charges generated by radiation inside the bonded bulk are expected to transit through the interface in order to be collected by the read-out electronics. In this work, we propose to explore and develop a model for the so-called Transient Current Technique (TCT) to identify the presence of deep traps at the bonded interface. For this purpose, we consider a simple PIN diode reversely biased where the ultra-low doped active region of interest is set in full depletion. In a first step, Synopsys Sentaurus TCAD is used to evaluate the soundness of this technique for interface traps characterization such as it may happen in bonded interfaces. Next, an analytical model is developed in details to give a better insight into the physics behind the TCT for interface layers. Further, this can be used as a simple tool to evidence what are the relevant parameters influencing the TCT signal and to set the basis for preliminary characterizations. K: Detection of defects; Detector modelling and simulations II (electric fields, charge transport, multiplication and induction, pulse formation, electron emission, etc); Models and simulations; Solid state detectors 1Corresponding author.

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Section: Jinst 11 P08016mentioning

confidence: 99%

Principle and modelling of Transient Current Technique for interface traps characterization in monolithic pixel detectors obtained by CMOS-compatible wafer bonding

et al. 2016

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Emerging wafer bonding technologies

Dragoi

Flötgen

Burggraf

et al. 2020

Handbook of Silicon Based MEMS Materials and Technologies

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Transient current technique for charged traps detection in silicon bonded interfaces

et al. 2019

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Wafer bonding is an established technology for the manufacturing of silicon-on-insulator (SOI) substrates, micro-electromechanical systems (MEMS) and microfluidic devices. Low temperature direct bonding techniques can be of particular interest for the fabrication of monolithic radiation sensors. Such techniques allow the joining of various absorbers on the backside of thinned CMOS circuity without intermediate layers or through vias. This paper presents a method for the electrical characterization of such bonded interfaces based on the Transient Current Technique (TCT). This method can be extended to the investigation of any type of solid-state devices.

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Monolithic Thin Wafer Stacking Using Low Temperture Direct Bonding

Cited by 4 publications

References 6 publications

Principle and modelling of Transient Current Technique for interface traps characterization in monolithic pixel detectors obtained by CMOS-compatible wafer bonding

Principle and modelling of Transient Current Technique for interface traps characterization in monolithic pixel detectors obtained by CMOS-compatible wafer bonding

Emerging wafer bonding technologies

Transient current technique for charged traps detection in silicon bonded interfaces

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