Monolithic CMOS distributed amplifier and oscillator

Distributed ESD protection for high-speed integrated circuits

“…Although this minimal reduction in withstand threshold seems to contradict previous data [6], it is consistent with observations of uniform triggering for short ESD pulses [14]. For comparison, CDM stress was also applied to an amplifier with a unity gain of 23 GHz [2]. In order to enable the high operating frequency, no ESD protection was incorporated, and a withstand threshold of only 200 V was observed.…”

“…The high frequency behavior of distributed amplification has been studied elsewhere [2]- [4]. This paper will focus on the ESD aspect of the distributed protection scheme.…”

“…A testchip was implemented in a triple metal (AlCu) 0.5-m CMOS technology. Line widths in the range 10 to 20 m are typical for low-loss transmission lines on Si substrate [2], [7]. To emulate the top level metal of an advanced process with thick and low resistivity material such as Cu, wider lines were used.…”

“…The design optimization will be similar to that used in our approach: by using high-line segments, the effective characteristic impedance including the additional device capacitance can be designed to match external components [ in 0741-3106/00$10.00 © 2000 IEEE Fig. 1(b)], yielding excellent broadband performance [2]- [4]. The idea of distributed ESD protection is controversial since the protection device is typically placed as close to the I/O pad as possible.…”

“…The distributed device would seem to exaggerate this nonuniformity. However, if low-resistive lines that are common in highfrequency designs are used [2]- [4], [7], the voltage drop due to metal line ohmic heating during the ESD event could be minimal [8], [9]. A small resistor in series with the ESD devices could further improve the snap-back triggering uniformity [10].…”