Monolithic bilayered In₂O₃ as an efficient interfacial material for high‐performance perovskite solar cells

Abstract

Carrier recombination at the buried SnO 2 /perovskite interface limits the efficiency and stability of n-i-p-structured perovskite solar cells (PSCs). Herein, we report an In 2 O 3 interfacial layer with the distinctive structure of the monolithic compact/nanostructured bilayer. The partial hydrolysis nature of the In 3+ ion enables the formation of nanorods on top of the compact In 2 O 3 layer when spin-coating the In(NO 3 ) 3 aqueous solution. This novel interfacial layer reduces the pinholes of the SnO 2 film and increases the contact area between the perovskite and electron transport material.

Screen‐Printing Technology for Scale Manufacturing of Perovskite Solar Cells

“…[196] Therefore, interface engineering has been developed to optimize the device. [197][198][199][200][201] For the interface of transparent back electrode, Ye et al modified ITO paste by mixing ITO powder, ethyl cellulose, and terpineol, which was used to screen-print the back ITO electrode. [202] The authors screen-printed TiO 2 , ZrO 2, and ITO layer by layer to prepare an all-inorganic mesoporous scaffold.…”

Synergic Electron and Defect Compensation Minimizes Voltage Loss in Lead‐Free Perovskite Solar Cells

“…Undoubtedly, these lethal issues will lessen the potential of perovskite photovoltaics towards practical application and real commercialization [5] . A great deal of research effort has been devoted to develop the eco‐friendly, lead‐free PSCs [6–10] . Sn perovskites featuring small band gaps of 1.3 eV–1.4 eV have attracted enormous research interest owing to their comparable optoelectronic properties to that of Pb counterparts and exhibited great potential to approach the theoretical Shockley‐Queisser efficiency limit [11] .…”

Post‐Treatment of Metal Halide Perovskites: From Morphology Control, Defect Passivation to Band Alignment and Construction of Heterostructures

“…[25][26][27][28][29] In general, the perovskite layer is sandwiched between an electron transporting layer (ETL) and a hole transporting layer (HTL). [30][31][32][33][34] Aiming to obtain high device performance, the perovskite layer, ETL, and HTL should possess proper morphology, interface contact, and form favorable band alignment. [30,31,[35][36][37][38][39][40][41][42][43] Figure 1.…”

“…[30][31][32][33][34] Aiming to obtain high device performance, the perovskite layer, ETL, and HTL should possess proper morphology, interface contact, and form favorable band alignment. [30,31,[35][36][37][38][39][40][41][42][43] Figure 1. Summary of post-treatments of perovskite thin films for improving the efficiency of PSCs.…”