Monitoring of power dissipated in microelectronic structures

Dziurdzia, P.; Kos, Andrzej

doi:10.1016/s0026-2714(01)00123-8

Cited by 3 publications

(5 citation statements)

References 10 publications

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“…Nevertheless, as long as we use data processing by means of electron devices, we have to consider energy losses. Due to the high power dissipations in present-day electronics, cooling and temperature management are and will be an important topic [2][3][4][5][6][7][8][9][10][11][12][13]. Although fan cooling is the most widely used, other alternatives such as natural convection, liquid cooling, heat pipes, new materials, Peltier heat pumps, harvesting, etc.…”

Section: Introductionmentioning

confidence: 99%

“…The main challenge for these high-performance devices is to ensure proper working temperature to reduce the interior energy density of the semiconductor structure. Decreasing the semiconductor structure temperature involves increasing its reliability and working efficiency [10,11,21,25].…”

Section: Introductionmentioning

confidence: 99%

“…The classical feedback loop in an active heat sink control system with Peltier pumps, commonly used in practice, is shown in Figure 1b and is based on the feedback caused by temperature sensors. The Peltier pump is driven to obtain the minimum chip temperature [6,[9][10][11]17,20,24]. The main disadvantages of the classical method are: large time delay in response to power changes (inertia of chip temperature sensors), sensitivity to the position of temperature sensors and chip temperature oscillations.…”

Section: Introductionmentioning

confidence: 99%

“…In this contribution, we present the idea of using the dissipated power in the circuit as the control parameter. Because most digital circuits operate at a constant DC supply voltage, measuring the supply current is enough to know the consumed power at any time [10].…”

Section: Introductionmentioning

confidence: 99%

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Optimal Temperature Regulation of Integrated Circuits with Peltier Heat Pumps

2022

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A thermal network will be presented to model a multi-layer structure consisting of a semiconductor structure, integrated Peltier heat pump and a cooling fin. A criterion will be set up to determine the optimal Peltier current to minimise the chip temperature using the power dissipation as the control parameter. Compared with classical methods, the proposed solution does not show any time delays in response to power changes and is not sensitive to the position of chip temperature sensors. It does not generate chip temperature oscillations. The idea can be applied in each integrated circuit cooled with Peltier heat pumps, e.g., power devices, high-performance processors, high-frequency integrated circuits, etc. The authors present a simple mathematical formula that can be easily implemented in the software of a processor being cooled. As a consequence, the device is able to operate with maximum efficiency assuming required reliability. Theoretical considerations are illustrated by some results of computations. The paper is addressed to designers involved in the creation of devices dissipating a significant amount of heat energy.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Optimal Temperature Regulation of Integrated Circuits with Peltier Heat Pumps

2022

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“…In literature (Howard et al, 2011;Lee et al, 2012;Jacquet et al, 2014), there is a focus on a specific device for a specific technology. Power estimation, reduction and monitoring are presented in papers (Dziurdzia and Kos, 2001;Brzozowski and Kos, 2005.…”

Section: Introductionmentioning

confidence: 99%

Energy losses and DVFS effectiveness vs technology scaling

Kocanda

Kos

2015

Microelectronics International

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Purpose – This article aims to present complete analysis of energy losses in complementary metal-oxide semiconductor (CMOS) circuits and the effectiveness of dynamic voltage and frequency scaling (DVFS) as a method of energy conservation in CMOS circuits in variety of technologies. Energy efficiency in CMOS devices is an issue of highest importance with still continuing technology scaling. There are powerful tools for energy conservation in form of dynamic voltage scaling (DVS) and dynamic frequency scaling (DFS). Design/methodology/approach – Using analytical equations and Spice models of various technologies, energy losses are calculated and effectiveness of DVS and DFS is evaluated for every technology. Findings – Test showed that new dedicated technology for low static energy consumption can be as economical as older technologies. The dynamic voltage and frequency scaling are most effective when there is a dominance of dynamic energy losses in circuit. In case when static energy losses are comparable to dynamic energy losses, use of dynamic voltage frequency scaling can even lead to increased energy consumption. Originality/value – This paper presents complete analysis of energy losses in CMOS circuits and effectiveness of mentioned methods of energy conservation in CMOS circuits in six different technologies.

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Monitoring of Switching Activity and Transition Times of Clock Signals in SoC Cells by Estimation of the Mean Value of IDD Current

Dziurdzia

2005 IEEE Conference on Electron Devices and Solid-State Circuits

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In the paper an idea of monitoring of System on Chips operation by estimation of the mean value (MV) of IDD current (IDDMV) in SoC cells is shown. A special monitoring unit of the MV of the IDD current is presented as well as results of simulations relating to monitoring of switching activity and transitions times of clock signals in exemplary SoC cells designed in 0.35* m technology. Following up of the MV of the IDD current in individual cells of a given SoC seems to be an universal way of testing of mixed circuits, leading in consequence to increased reliability and production yield.

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Monitoring of power dissipated in microelectronic structures

Cited by 3 publications

References 10 publications

Optimal Temperature Regulation of Integrated Circuits with Peltier Heat Pumps

Optimal Temperature Regulation of Integrated Circuits with Peltier Heat Pumps

Energy losses and DVFS effectiveness vs technology scaling

Monitoring of Switching Activity and Transition Times of Clock Signals in SoC Cells by Estimation of the Mean Value of IDD Current

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