2016 IEEE Applied Power Electronics Conference and Exposition (APEC) 2016
DOI: 10.1109/apec.2016.7467957
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Modular test system architecture for device, circuit and system level reliability testing

Abstract: Reliability stress testing of power semiconductors requires significant development effort for a test apparatus to provide the required functionality. This paper presents a modular test system architecture which focuses on flexibility, reusability and adaptability to future test requirements. Different types of tests for different devices in application circuit configuration can be implemented based on the same modular test system concept. Vital parameters of the device under test (DUT) can be acquired in situ… Show more

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Cited by 3 publications
(1 citation statement)
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“…Long term testing of the devices under real application conditions with no fails is a first necessary step, but only application testing with accelerated conditions (e.g. higher temperatures, bus voltages, peak currents) and testing to failure allows extraction of life time models and hence failure rates in real life [145]. As a joint effort by the major semiconductor companies involved in GaN, a working group for the standardization of GaN qualification under the framework of JEDEC has been recently established to address many of the before mentioned aspects [146].…”
Section: Oliver Häberlenmentioning
confidence: 99%
“…Long term testing of the devices under real application conditions with no fails is a first necessary step, but only application testing with accelerated conditions (e.g. higher temperatures, bus voltages, peak currents) and testing to failure allows extraction of life time models and hence failure rates in real life [145]. As a joint effort by the major semiconductor companies involved in GaN, a working group for the standardization of GaN qualification under the framework of JEDEC has been recently established to address many of the before mentioned aspects [146].…”
Section: Oliver Häberlenmentioning
confidence: 99%