Modified reduced device multilevel inverter structures with open circuit fault‐tolerance capabilities

Abstract

Summary Reliability and large number of components are major challenges for multilevel inverters being used in many industrial applications. These inverters may face situations like failure of power switches, which, in turn, can cause severe damage to other equipment of the system. Hence, it is important these inverters are fault‐tolerant. In this article, some of the recently proposed reduced device multilevel inverter (RD‐MI) topologies are considered and analyzed in light of imparting open circuit fault‐tolerance capability. In RD‐MIs, the occurrence of faults would cause a shutdown of the system due to the lack of redundant switching states. However, for the cases involving “any single open‐switch failure (SOSF),” the system can continue to operate uninterrupted by imparting fault‐tolerant (FT) feature to the RD‐MIs. With the proposed solution, the complete system shutdown can be avoided, thereby achieving higher reliability. In this work, two RD‐MIs are chosen to demonstrate the proposed approach. Further, the proposed FT RD‐MIs based on suggested FT strategy under the healthy and abnormal modes are simulated using MATLAB/Simulink software. The obtained simulation results are experimentally validated.

Resilient multilevel inverter topology with improved reliability

“…The proposed nine‐level inherent fault‐tolerant MLI topology is compared with conventional diode clamped, flying capacitor and CHB, along with the other topologies proposed in [16, 17, 21, 25, 26, 40] as depicted in Table 7. The superiority of the proposed topology as compared to conventional topologies, proposed in [29, 31, 32] is shown in Fig.…”

“…Table 7 reveals that the proposed topology requires less number of controlled switches, capacitors and gate drivers as compared to conventional diode clamped, flying capacitor, CHB, [17, 25, 26] inverter topologies. The proposed topology utilises the least number of DC sources in comparison with CHB, [25, 26, 40] and an equal number of sources compared with topologies [16, 21]. Even though the required sources are equal for [16] and proposed topology, topology [16] has been generated only five‐level waveforms.…”

“…In addition to this, it needed centre‐tapped auto‐transformer to operate in a fault situation. Similarly, the topology [40] generates a seven‐level output voltage waveform with an increased number of sources. The topology [21] requires a higher number of capacitors to generate the same output levels.…”

“…It does not possess fault‐tolerant characteristics and additionally requires voltage sensors for balancing the capacitor's voltage is the limitation of the topology. The topologies proposed in [16, 21, 25, 26, 40] utilise redundant switches/relays as means to satisfactorily operate in a faulty condition. However, in such topologies, the employed redundant switches have zero utilisation under healthy operating condition.…”

Fault‐tolerant multi‐level inverter topologies for open‐end winding induction motor drive

“…Recent years have witnessed vast research in areas of MLI topologies and many of such topologies that are present in the literature are the blend of conventional topologies 5‐7 . Several topologies were proposed to satisfy the desires of the industry such as reduced device count and fault‐tolerance 8‐13 …”