Models of computation for NoC mapping: Timing and energy saving awareness

Marcon, César; Webber, Thais; Susin, Altamiro

doi:10.1016/j.mejo.2016.09.005

Cited by 6 publications

(3 citation statements)

References 51 publications

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“…In [110], the complicated application is executed as SoC demands large-scale system modeling. In which the execution includes a high amount of cores and improved connection methods like NoC.…”

Section: Energy-aware Schemesmentioning

confidence: 99%

“…In [119], the static and the dynamic mapping into regular NoCs, preparing the categorization based on the calculation and connection shape is addressed. In addition, the advantages and disadvantages of MoCs are provided and nally, in this paper, the ve MoCs utilized more for mapping are presented, and compare the methods by using benchmarks formed of synthetic and embedded applications running on different NoCs.…”

Section: Energy-aware Schemesmentioning

confidence: 99%

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Towards Task Mapping Approaches in Network on Chips: A Comprehensive Survey

Màsdàrí

2023

Preprint

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One of the main stages of Network on Chip (NoC) is task mapping where the application tasks are mapped to the processing resources. Task mapping decisions have a direct impact on the NoC performance and can be classified as static or dynamic mapping methods. In this paper, we carry out a comprehensive systematic study of task mapping schemes in various NoCs. For this purpose, firstly, an overview of the task mapping's main concepts is presented. Then, a taxonomy of the mapping schemes regarding their objectives and applied mapping factors is presented and the studied schemes are categorized into fault-tolerant schemes, congestion-aware schemes, communication-aware approaches, temperature-aware methods, and energy-aware schemes. Afterward, their main contributions, provided services, and drawbacks of the proposed studies in the literature are illustrated. Moreover, a comprehensive discussion of various features of the investigated mapping methods is presented and issues such as the applied algorithms, simulators, datasets, and evaluation metrics are discussed. Finally, the concluding issues and open research areas are highlighted.

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Section: Energy-aware Schemesmentioning

confidence: 99%

Section: Energy-aware Schemesmentioning

confidence: 99%

Towards Task Mapping Approaches in Network on Chips: A Comprehensive Survey

Màsdàrí

2023

Preprint

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“…Depending on the time of the execution of task mapping, there exist two divisions for task mapping algorithms, namely, static and dynamic. The dynamic topography procedures have been conducted when application is being executed (Marcon et al, 2017;Pang et al, 2016). As in these kinds of procedures both the total system postponement and power usage are increased, the static mapping techniques are suggested (Pang et al, 2016).…”

Section: Introductionmentioning

confidence: 99%

Tasks mapping in the network on a chip using an improved optimization algorithm

Darbandi¹,

Ramtin

Sharafi

2020

IJPCC

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Purpose A set of routers that are connected over communication channels can from network-on-chip (NoC). High performance, scalability, modularity and the ability to parallel the structure of the communications are some of its advantages. Because of the growing number of cores of NoC, their arrangement has got more valuable. The mapping action is done based on assigning different functional units to different nodes on the NoC, and the way it is done contains a significant effect on implementation and network power utilization. The NoC mapping issue is one of the NP-hard problems. Therefore, for achieving optimal or near-optimal answers, meta-heuristic algorithms are the perfect choices. The purpose of this paper is to design a novel procedure for mapping process cores for reducing communication delays and cost parameters. A multi-objective particle swarm optimization algorithm standing on crowding distance (MOPSO-CD) has been used for this purpose. Design/methodology/approach In the proposed approach, in which the two-dimensional mesh topology has been used as base construction, the mapping operation is divided into two stages as follows: allocating the tasks to suitable cores of intellectual property; and plotting the map of these cores in a specific tile on the platform of NoC. Findings The proposed method has dramatically improved the related problems and limitations of meta-heuristic algorithms. This algorithm performs better than the particle swarm optimization (PSO) and genetic algorithm in convergence to the Pareto, producing a proficiently divided collection of solving ways and the computational time. The results of the simulation also show that the delay parameter of the proposed method is 1.1 per cent better than the genetic algorithm and 0.5 per cent better than the PSO algorithm. Also, in the communication cost parameter, the proposed method has 2.7 per cent better action than a genetic algorithm and 0.16 per cent better action than the PSO algorithm. Originality/value As yet, the MOPSO-CD algorithm has not been used for solving the task mapping issue in the NoC.

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Co-synthesis of contention-free energy-efficient NOC-based real time embedded systems

Deniziak

Tomaszewski

2019

Journal of Systems Architecture

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Models of computation for NoC mapping: Timing and energy saving awareness

Cited by 6 publications

References 51 publications

Towards Task Mapping Approaches in Network on Chips: A Comprehensive Survey

Towards Task Mapping Approaches in Network on Chips: A Comprehensive Survey

Tasks mapping in the network on a chip using an improved optimization algorithm

Co-synthesis of contention-free energy-efficient NOC-based real time embedded systems

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