Modelling of Gas-Phase Photosistulus Processes of Submicronic Structures Lsi/Vlsi

Abstract

Modern submicron technology of epitaxial GaAs-layout on monosilicon substrates requires significant development and improvement of precision low-temperature methods for the formation of functional layout in properties that are not inferior to layers formed by high-temperature methods. Today, in order to increase the speed and impedance of submicron combined silicon and arsenide-based structures, the LSI/VLSI is intensively searching for new high-efficient technological operations for the formation of their structures, which would reduce the temperature of deposition of functional layers and increase the temperature stability of concentration profiles and charge state. The submicron technology of forming LSI/ VLSI structures has been developed, which includes a whole complex of studies of unique processes of gas-phase photo stimulating processes: oxidation, etching of epitaxy, diffusion, implantation, activation of impurities, and reduction of low-level hidden contacts. Particularly relevant today are processes of submicron technology, which do not change the concentration profiles of homo- and heterojunction in the process of formation of the structures of the LSI and are highly stimulating in reducing the time of execution of the technological route for short microcycles in the individual processing of mono-Si substrates of large diameter (> 150 mm).In this paper, the essence of the conducted researches in the given processes of submicron technology LSI/VLSI, which increase them as resolution, and charge stability, is disclosed.