2017
DOI: 10.1063/1.4983455
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Modeling of light-induced degradation due to Cu precipitation in p-type silicon. II. Comparison of simulations and experiments

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Cited by 17 publications
(20 citation statements)
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“…For simplicity, the precipitates were modeled in this work as spheres. As will be shown in Paper II 76 of this article, satisfactory agreement with experiments is obtained with this assumption, showing that at least the effective behavior can be reproduced with the spherical shape.…”
supporting
confidence: 73%
See 2 more Smart Citations
“…For simplicity, the precipitates were modeled in this work as spheres. As will be shown in Paper II 76 of this article, satisfactory agreement with experiments is obtained with this assumption, showing that at least the effective behavior can be reproduced with the spherical shape.…”
supporting
confidence: 73%
“…Since time evolution and injection dependence of the BO defect-limited minority carrier lifetime are currently well known, 26,45,46 combining this information with the present model enables the reproduction of full LID curves, that is, minority carrier lifetime as a function of illumination time when both Cu-LID and BO-LID are present simultaneously as separate defects. 21 The validity of the model is investigated in Paper II 76 of this article, using as examples different earlier published and newly observed unpublished aspects of Cu-LID, including dependence on Cu concentration, temperature, intensity, and doping concentration.…”
Section: 195703-1mentioning
confidence: 99%
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“…3 was confirmed to be primarily due to the BO-defect based on its known degradation kinetics, i.e., following the procedure described in Ref. 1.…”
mentioning
confidence: 95%
“…6 This phenomenon is referred in literature to as copper-related light-induced degradation (Cu-LID) and recent root-cause investigations have proven that Cu-LID arises from the transformation of interstitial Cu atoms into highly recombination active precipitates in the bulk region of the wafer. [7][8][9][10] Gettering is a well-established technique, by which transition metal impurities are relocated to pre-defined substrate areas where they result less harmful for the device performance. In devices where the wafer bulk represents the region of major relevance for the device performance (e.g.…”
Section: Introductionmentioning
confidence: 99%