Modeling of Cu-CMP and Its Application for Hotspot Prediction

Abstract

In sub-100 nm nodes, continuously shrinking CD imposes more demanding requirement on wafer planarity to satisfy constrains of diminishing DOF of lithography process. However, due to incoming non-planarity of wafer surface caused by ECP, and inherent removal rate selectivity regarding to dielectric and metal films of CMP slurries, post Cu-CMP topography exhibits strong dependency not only on process conditions, but also on layout pattern of processed wafers. In this paper, such layout pattern-dependency of post Cu-CMP topography was studied with a pre-designed test chip. Post CMP Cu line thickness and area array-height were characterized with respect to metal line width and feature pattern density. Semi-empirical models were built based on multivariate response surface methodology (RSM) to simulate post Cu-CMP surface topography. By applying the developed models, post CMP Cu-line thickness and area array height were predicted across a shot of M1 layer of a typical 40 nm logic product. The prediction is verified by TEM cross section for selected features. Potential risky hotspots were successfully highlighted by the models.

Effect of Chelating Agent and Ammonium Dodecyl Sulfate on the Interfacial Behavior of Copper CMP for GLSI

“…[1][2][3][4] Chemical mechanical planarization (CMP) is an essential procedure in the fabrication of Giant Large Scale Integrated circuit. [5][6][7][8][9] CMP process can eliminate undesirable topography caused by deposition of thin films over structured features, and provide necessary conditions for the fabrication of the next wiring level on the plane surface. Planarization is achieved for the slurry abrasives are responsible for mechanical action in combination with the polishing pad.…”

An Oxide Chemical Mechanical Planarization Model for HKMG Structures

“…The surface topography can be predicted directly by a geometry-based CVD model with parameters extracted from experiments. 44,45 For model simplicity, it is assumed that the surface height of CVD films is pattern-related, which leads to a simple relationship between the surface thicknesses H up and H down and the line width W and line space S.…”