Modeling of contuctance fluctuations in small area metal–oxide–semiconductor transistors

Abstract

A theoretical analysis for the calculation of the conductance fluctuations in small area metal–oxide–semiconductor (MOS) devices is presented. This analysis relies essentially on the assumption that the trap region in the device channel can be approximated by a rectangular region inside which the sheet conductivity differs from that in the region of the channel outside the trap. The sheet conductivity shift in the trap region is evaluated using the concept of flat band voltage shift associated with the trapping of one elementary charge in the trap region. The approach of flat band voltage shift is then advantageously used to derive first‐order analytic expressions of the random telegraph signal (RTS) amplitude. In particular, it is found both, analytically and numerically that, in the case of small sheet conductivity modulation, the RTS amplitude becomes independent of the trap size. The numerical simulations show that the maximum RTS amplitude occurring in weak inversion is not a monotonic function of the trap size. Indeed, the normalized conductance fluctuation does increase as the trap area is reduced, passes through a maximum and finally decreases towards zero. The comparison of the simulation results with typical experimental RTS data shows an overall good agreement. In particular, it is clearly demonstrated from the RTS measurements that the gate voltage dependence of the normalized RTS amplitude can be strongly correlated to that of the transconductance to drain current ratio gm/Id.

Single Electron EffectsandStructuralEffects in Ultrascaled Silicon Nanocrystal Floating-Gate Memories

“…After developments, (1) yields (2) It should be stated that, in this capacitive approach, the threshold voltage shift is independent from the area of the silicon dot, but only depends on the total gate area A and on the number of charges trapped in the Si-dot. Note that this result is consistent with the random telegraph signal (RTS) theory, which, based on transport formulation [7], states that the RTS amplitude scales as the reciprocal gate area.…”

Low frequency noise in advanced Si bulk and SOI MOSFETs

“…It should be mentioned that Eqs. (2a,b) also applies to the nonlinear regime of MOSFET operation [23]. Indeed, the drain voltage dependence of S I d /I 2 d is naturally accounted for by that of the transconductance to drain current ratio squared (g m /I d ) 2 .…”

RTS in Submicron MOSFETs: Lateral Field Effect and Active Trap Position

“…A systematic analysis of two levels RTS signal was made to obtain the information on the capture and emission processes as a fimction of gate voltage, drain current and temperature for the low and high lateral electric field [1][2][3]. In the submicron technology (for channel length less than 0.3 |am) the application of the drain voltage IV results in the high lateral electric field, which exceeds about 5 times the silicon critical field.…”