Modeling of CMOS digital-to-analog converters for telecommunication

Wikner, J. Jacob; Tan, Nianxiong

doi:10.1109/82.769797

Cited by 63 publications

(36 citation statements)

References 15 publications

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“…As illustrated in Fig. 2.4, there is normally a relationship between resolution and frequency in digital-to-analog converters [19][20][21][22][23]: with higher frequencies, the linearity decreases [20,24].…”

Section: Current-steering Digital-to-analog Convertersmentioning

confidence: 99%

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On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters

Sadeghifar¹

2015

Linköping Studies in Science and Technology. Thesis

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High-speed and high-resolution digital-to-analog converters (DACs) are vital components in all telecommunication systems. Radio-frequency digital-to-analog converter (RFDAC) provides high-speed and high-resolution conversion from digital domain to an analog signal. RFDACs can be employed in direct-conversion radio transmitter architectures. The idea of RFDAC is to utilize an oscillatorypulse-amplitude modulation instead of the conventional zero-order hold pulse amplitude modulation, which results in DAC output spectrum to have highenergy high-frequency lobe, other than the Nyquist main lobe. The frequency of the oscillatory pulse can be chosen, with respect to the sample frequency, such that the aliasing images of the signal at integer multiples of the sample frequency are landed in the high-energy high-frequency lobes of the DAC frequency response. Therefore the high-frequency images of the signal can be used as the output of the DAC, i.e., no need to the mixing stage for frequency upconversion after the DAC in the radio transmitter. The mixing stage however is not eliminated but it is rather moved into the DAC elements and therefore the local oscillator (LO) signal with high frequency should be delivered to each individual DAC element.In direct-conversion architecture of IQ modulators which utilize the RFDAC technique, however, there is a problem of finite image rejection. The origin of this problem is the different polarity of the spectral response of the oscillatorypulse-amplitude modulation in I and Q branches. The conditions where this problem can be alleviated in IQ modulator employing RFDACs is also discussed in this work.Σ∆ modulators are used preceding the DAC in the transmitter chain to reduce the digital signal's number of bits, still maintain the same resolution. By utilizing the Σ∆ modulator now the total number of DAC elements has decreased and therefore the delivery of the high-frequency LO signal to each DAC element is practical. One of the costs of employing Σ∆ modulator, however, is a higher quantization noise power at the output of the DAC. The quantization noise is ideally spectrally shaped to out-of-band frequencies by the Σ∆ modulator. The shaped noise which usually has comparatively high power must be filtered out to fulfill the radio transmission spectral mask requirement.Semi-digital FIR filter can be used in the context of digital-to-analog conversion, cascaded with Σ∆ modulator to filter the out-of-band noise by the modulator. In the same time it converts the signal from digital domain to an analog quantity. In general case, we can have a multi-bit, semi-digital FIR filter where each tap of the filter is realized with a sub-DAC of M bits. The delay elements are also realized with M-bit shift registers. If the output of the modulator is given by a single bit, the semi-digital FIR filter taps are simply controlled by a single switch assuming a current-steering architecture DAC. One of the major advantages is that the static linearity of the DAC is optimum. Since there are only t...

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Section: Current-steering Digital-to-analog Convertersmentioning

confidence: 99%

“…In applications with much wider signal bands, such as ADSL and Bluetooth, there are implementations suggested [19,20,50,57,66]. For a given modulator order (L), and assuming a modulator that shapes noise to higher frequencies, i.e., a…”

Section: σ∆ Modulatormentioning

confidence: 99%

On High-Speed Digital-to-Analog Converters and Semi-Digital FIR Filters

Sadeghifar¹

2015

Linköping Studies in Science and Technology. Thesis

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“…When applications require high speed and high resolution, the current-steering DAC architecture is almost exclusively used. It is widely known that inaccurate settled values and nonlinear switching transient both contribute to spectral harmonics in the DAC output [5]. These harmonics are the major factors limiting the spurious free dynamic range (SFDR) of the DAC.…”

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confidence: 99%

A 1.5-v 14-bit 100-MS/s self-calibrated DAC

Cong

Geiger

2003

IEEE J. Solid-State Circuits

128

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Abstract-Large-area current source arrays are widely used in current-steering digital-to-analog converters (DACs) to statistically maintain a required level of matching accuracy between the current sources. This not only results in large die size but also in significant degradation of dynamic range for high-frequency signals. To overcome technology barriers, relax requirements on the layout, and reduce DAC sensitivities to process, temperature, and aging, calibration is emerging as a viable solution for the next-generation high-performance DACs. In this paper, a new foreground calibration technique suitable for very-low-voltage environments is presented which effectively compensates for current source mismatch, and achieves high linearity with small die size and low power consumption. Settling and dynamic performance are also improved due to a dramatic reduction of parasitic effects. To demonstrate this technique, a 14-bit DAC prototype was implemented in a 0.13-m digital CMOS process. This is the first CMOS DAC reported that operates with a single 1.5-V power supply and achieves 14-bit linearity with less than 0.1 mm 2 of active area. At 100 MS/s, the spurious free dynamic range is 82 dB (62 dB) for signals of 0.9 MHz (42 MHz) and the power consumption is only 16.7 mW.

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“…The performance of current-steering DACs is generally characterized by their static and dynamic properties [6]- [8]. The static properties represent the DAC performance at dc or low frequencies.…”

Section: Chapter Overviewmentioning

confidence: 99%

“…To [6], [8], [ 17]- [ 19]. For digital code D, D current sources are driven to a resistor of value R.…”

Section: Output Impedancementioning

confidence: 99%