2014
DOI: 10.1109/ted.2014.2364451
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Modeling of Capacitance Characteristics of Printed p-Type Organic Thin-Film Transistors

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Cited by 14 publications
(14 citation statements)
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“…We calculated such factors using a formula proposed by Elmasry, [68] yielding α f,gs = 12.4% and α f,gd = 21.1%, which is in perfect agreement with our measured data. This effect has already been explained for structures of this kind, [69] and originates from the fact that the semiconductor layer is not patterned, covering the whole substrate. This effect has already been explained for structures of this kind, [69] and originates from the fact that the semiconductor layer is not patterned, covering the whole substrate.…”
Section: Resultsmentioning
confidence: 88%
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“…We calculated such factors using a formula proposed by Elmasry, [68] yielding α f,gs = 12.4% and α f,gd = 21.1%, which is in perfect agreement with our measured data. This effect has already been explained for structures of this kind, [69] and originates from the fact that the semiconductor layer is not patterned, covering the whole substrate. This effect has already been explained for structures of this kind, [69] and originates from the fact that the semiconductor layer is not patterned, covering the whole substrate.…”
Section: Resultsmentioning
confidence: 88%
“…In the case of C gd , the measured values are correctly constant at ≈0.8 pF up to a bias voltage of 5 V, while C gs exhibits a slightly increasing trend with the bias voltage, which we attribute to parasitic accumulation of additional charge outside the channel active area. This effect has already been explained for structures of this kind, and originates from the fact that the semiconductor layer is not patterned, covering the whole substrate. At bias voltages >5 V, the higher electric fields are producing a further increase in capacitance and a relatively small deviation from the predicted values.…”
Section: Resultsmentioning
confidence: 92%
“…The larger Δn calculated from C−V measurements is not surprising as parasitic capacitance in the thin film transistor configuration will increase the measured capacitance. 61 Finally, Na 2 Se surface treatment of CuInSe 2 NC films introduces the largest degree of fusion and excess surface Se 2− for In-dopant binding, yielding the largest In:Cu ratio of 1.07 ± 0.10:1 (Figure 4B). This treatment produces the best performing CuInSe 2 NC FETs with the highest μ e = 10.5 ± 2.4 cm 2 /(V s) and the lowest V T = 19.1 ± 1.8 V. The additional electron concentration, compared to that for samples without surface chalcogen treatment, increases to 1.36 × 10 18 electrons/cm 3 , as calculated from V T (Figure 4C) and 6.0 × 10 18 electrons/cm 3 , as calculated by C−V measurement (Supporting Information Figure S8B).…”
Section: Resultsmentioning
confidence: 99%
“…[15][16][17][18][19] However, the influence of the overlap region on the OFET characteristics has not been explicitly investigated. [15][16][17][18][19] It is therefore important to investigate the influences of both overlap and peripheral regions on the ac characteristics of OFETs. However, the influences of both peripheral and overlap regions on the complex impedance of OFETs have not been quantitatively investigated.…”
mentioning
confidence: 99%