1992
DOI: 10.1109/16.137323
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Modeling of amorphous-silicon thin-film transistors for circuit simulations with SPICE

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Cited by 60 publications
(21 citation statements)
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“…In general, the trapping and the de-trapping time constants need not be equal. Incorporating the effect of drain source bias in the linear region of TFT operation [10], (5) is modified to (6). This is the final equation which is used in the simulator.…”
Section: Recursive Model Of Vt Shift and Integration With Aim-spicementioning
confidence: 99%
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“…In general, the trapping and the de-trapping time constants need not be equal. Incorporating the effect of drain source bias in the linear region of TFT operation [10], (5) is modified to (6). This is the final equation which is used in the simulator.…”
Section: Recursive Model Of Vt Shift and Integration With Aim-spicementioning
confidence: 99%
“…The amorphous TFT has been modeled and integrated into Level 11 and Level 15 of AIM-Spice to aid circuit design [6]- [8] However, these models do not yet account for the integration of the effects of charge trapping in the TFT, particularly the V T shift. Since the amorphous silicon TFT models (Level 11 and level 15) of AIM-Spice are copyright protected, the open-source BSIM4V4 model has been used for the purpose of demonstration.…”
Section: B Integration With Aim-spicementioning
confidence: 99%
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“…The inorganic semiconductor and organic semiconductor TFT has been well modeled and integrated into AIM-Spice (level 11 and level 15) and other simulators [5]- [10].…”
Section: Introductionmentioning
confidence: 99%
“…In this direction, [13] presents a SPICE based model for static and dynamic performance for amorphous silicon-based thin film transistor. Focusing more on material properties and considering the change in valence and conduction band structure during externally applied stress, [14] terms these changes as an effective change of material itself.…”
Section: Introductionmentioning
confidence: 99%