Modeling Device Driver Effects in Real-Time Schedulability Analysis: Study of a Network Driver

Lewandowski, Marcin; Stanovich, Mark; Baker, Theodore P.; Gopalan, Kartik; Wang, An-I

doi:10.1109/rtas.2007.18

Cited by 18 publications

(17 citation statements)

References 12 publications

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“…For peripheral drivers, Facchinetti et al [5] proposed using a non-preemptive interrupt server to better support the reusing of legacy drivers. Additionally, analysis can be done to model worst-case temporal interference caused by device drivers [12]. For real-time compilation, a tight coupling between compiler and worst-case execution time (WCET) analyzer can optimize a program's WCET [6].…”

Section: Related Workmentioning

confidence: 99%

A Predictable Execution Model for COTS-Based Embedded Systems

Pellizzoni

Betti

Bak

et al. 2011

2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium

202

197

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Abstract-Building safety-critical real-time systems out of inexpensive, non-real-time, COTS components is challenging. Although COTS components generally offer high performance, they can occasionally incur significant timing delays. To prevent this, we propose controlling the operating point of each shared resource (like the cache, memory, and interconnection buses) to maintain it below its saturation limit. This is necessary because the low-level arbiters of these shared resources are not typically designed to provide real-time guarantees. In this work, we introduce a novel system execution model, the PRedictable Execution Model (PREM), which, in contrast to the standard COTS execution model, coschedules at a high level all active components in the system, such as CPU cores and I/O peripherals. In order to permit predictable, system-wide execution, we argue that realtime embedded applications should be compiled according to a new set of rules dictated by PREM. To experimentally validate our theory, we developed a COTS-based PREM testbed and modified the LLVM Compiler Infrastructure to produce PREMcompatible executables.

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Section: Related Workmentioning

confidence: 99%

A Predictable Execution Model for COTS-Based Embedded Systems

Pellizzoni

Betti

Bak

et al. 2011

2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium

202

197

View full text Add to dashboard Cite

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“…In dependent mode, a klmirqd thread executes on behalf of a tasklet owner (the real-time client task using the interrupt-raising device), and in independent mode, a klmirqd thread runs as a bandwidth server. The latter mode is useful for constraining the utilization of anonymous tasklets (those with no owners), which is common to network traffic [22], [23].…”

Section: Interrupt Handling In Litmus Rt Litmusmentioning

confidence: 99%

Robust Real-Time Multiprocessor Interrupt Handling Motivated by GPUs

Elliott

Anderson

2012

2012 24th Euromicro Conference on Real-Time Systems

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Abstract-Architectures in which multicore chips are augmented with graphics processing units (GPUs) have great potential in many domains in which computationally intensive real-time workloads must be supported. However, unlike standard CPUs, GPUs are treated as I/O devices and require the use of interrupts to facilitate communication with CPUs. Given their disruptive nature, interrupts must be dealt with carefully in real-time systems. With GPU-driven interrupts, such disruptiveness is further compounded by the closed-source nature of GPU drivers. In this paper, such problems are considered and a solution is presented in the form of an extension to LITMUS RT called klmirqd. The design of klmirqd targets systems with multiple CPUs and GPUs. In such settings, interruptrelated issues arise that have not been previously addressed.

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“…While others have proposed methods to unify task and interrupt scheduling [10], or have considered bandwidth constraints on device driver execution [9], Quest attempts to combine both the prioritization of I/O events and budget limits for their handling with task scheduling. In doing so, we describe a method to integrate asynchronous event processing for both device interrupts and tasks waking up after the completion of blocking (e.g., I/O) operations.…”

Section: Related Workmentioning

confidence: 99%