Modeling and Integration of Peripheral Devices in Embedded Systems

Wang, Shaojie; Malik, Sharad; Bergamaschi, Reinaldo A.

doi:10.1007/0-306-48709-8_6

Cited by 13 publications

(20 citation statements)

References 2 publications

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“…The latter remains developed in a classical way. Wang and Malik [10] propose another model which allows to generate full drivers and to check some properties in the model. While the approach is interesting, it targets UNIX-like systems, respecting the traditional driver model for compatibility reasons.…”

Section: Figure 2 Proposed Development Methodologymentioning

confidence: 99%

Device driver synthesis for embedded systems

Tanguy¹,

Béchennec²,

Briday

et al. 2013

2013 IEEE 18th Conference on Emerging Technologies &Amp; Factory Automation (ETFA)

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Currently the development of embedded software managing hardware devices that fulfills industrial constraints (safety, real time constraints) is a very complex task. To allow an increased reusability between projects, generic device drivers have been developed in order to be used in a wide range of applications. Usually the level of genericity of such drivers require a lot of configuration code, which is often generated. However, a generic driver requires a lot of configuration and need more computing power and more memory needs than a specific driver. This paper presents a more efficient methodology to solve this issue based on a formal modeling of the device and the application. Starting from this modeling, we use well-known game theory techniques to solve the driver model synthesis problem. The resulting model is then translated into the actual driver embedded code with respect to an implementation model. By isolating the model of the device, we allow more reusability and interoperability between devices for a given application, while generating an applicationspecific driver.

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Section: Figure 2 Proposed Development Methodologymentioning

confidence: 99%

Device driver synthesis for embedded systems

Tanguy¹,

Béchennec²,

Briday

et al. 2013

2013 IEEE 18th Conference on Emerging Technologies &Amp; Factory Automation (ETFA)

View full text Add to dashboard Cite

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“…In this case, device drivers must be generated to connect the application to any new device. The development of a device driver may be very complex, because it requires detailed knowledge about processors, peripherals, operating systems, compilers, and logic and timing requirements [38]. Wang et al [38] propose the automatic generation of device drivers from a high-level device specification, which is platform neutral.…”

Section: Software Synthesismentioning

confidence: 99%

“…Hardware-hardware Polaris [34] Wrappers between arbitrary hw IP interfaces PIG [35] Wrappers between arbitrary hw IP interfaces Software-software TEReCS [36] OS with communication mechanisms and scheduler IPChinook [37] Scheduler and bus hw interfaces Software-hardware O'Nils and Jantsch [8] DMA controllers and device drivers Wang et al [38] Device drivers General-purpose ROSES [40] Wrappers and OS for arbitrary hw/sw IP interfaces COSY [39] Wrappers for pre-defined hw/sw communication schemes…”

Section: Ips Connectedmentioning

confidence: 99%

Strategies for the integration of hardware and software IP components in embedded systems-on-chip

Wagner¹,

Cesario²,

Carro³

et al. 2004

Integration

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“…If operating systems are used on programmable cores to relieve the application programmer from details of the hardware and provide services at run-time, the problem arises that traditional general-purpose operating systems offer too much functionality, do not meet hard real-time constraints, and have large resource requirements. Apart from porting an existing third party real-time operating system to the system under development and leveraging knowledge from systematic device driver generation [85,120], the generation/synthesis of a lean operating system, e.g. starting from a primary kernel of an open-source OS, could also be an option [35,8].…”

Section: Supporting Functionality For Automated Dsementioning

confidence: 99%

Methods for evaluating and covering the design space during early design development

Gries

2004

Integration, the VLSI Journal

114

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This paper gives an overview of methods used for Design Space Exploration (DSE) at the system-and micro-architecture levels. The DSE problem is considered to be two orthogonal issues: (I) How could a single design point be evaluated, (II) how could the design space be covered during the exploration process? The latter question arises since an exhaustive exploration of the design space by evaluating every possible design point is usually prohibitive due to the sheer size of the design space. We therefore reveal trade-offs linked to the choice of appropriate evaluation and coverage methods. The designer has to balance the following issues: the accuracy of the evaluation, the time it takes to evaluate one design point (including the implementation of the evaluation model), the precision/granularity of the design space coverage, and last but not least the possibilities for automating the exploration process. We also list common representations of the design space and compare current system and micro-architecture level design frameworks. This review thus eases the choice of a decent exploration policy by providing a comprehensive survey and classification of recent related work. It is focused on System-on-a-Chip designs, particularly those used for network processors. These systems are heterogeneous in nature using multiple computation, communication, memory, and peripheral resources.Keywords: Design space exploration, design space pruning, system-level design, micro-architecture design, design frameworks, benchmarking, multi-objective search. NoteWe focus on related work which applies methods in the context of design space exploration. Discussing the theory of optimization methods and the fundamentals of design evaluation is beyond the scope of this survey.

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Modeling and Integration of Peripheral Devices in Embedded Systems

Cited by 13 publications

References 2 publications

Device driver synthesis for embedded systems

Device driver synthesis for embedded systems

Strategies for the integration of hardware and software IP components in embedded systems-on-chip

Methods for evaluating and covering the design space during early design development

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