Strategies for the integration of hardware and software IP components in embedded systems-on-chip

Wagner, Flávio Rech; Cesario, W.; Carro, Luigi; Jerraya, Ahmed

doi:10.1016/j.vlsi.2003.12.005

Cited by 22 publications

(10 citation statements)

References 49 publications

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“…These are the challenges beyond simply placing components together. We need good strategies for the integration of hardware and software IP components [87].…”

Section: Ip Integrationmentioning

confidence: 99%

Trend and Challenge on System-on-a-Chip Designs

Chen

Kung

2007

J Sign Process Syst Sign Image Video Technol

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The success of system-on-a-chip (SoC) hinges upon a well-concerted integrated approach from multiple disciplines, such as device, design, and application. From the device perspective, rapidly improving VLSI technology allows the integration of billions of transistors on a single chip, thus permitting a wide range of functions to be combined on one chip. From the application perspective, numerous killer applications have been identified, which can make full use of the aforementioned functionalities provided by a single chip. From the design perspective, however, with greater device integration, system designs become more complex and are increasingly challenging to design. Moving forward, novel approaches will be needed to meet these challenges. This paper explores several new design strategies, which represent the current design trends to deal with the emerging issues. For example, recognizing the stringent requirements on power consumption, memory bandwidth/ latency, and transistor variability, novel power/thermal management, multi-processor SoC, reconfigurable logic, and design for verification and testing have now been incorporated into modern system design. In addition, we look into some plausible solutions. For example, further innovations on scalable, reusable, and reliable system architectures, IP deployment and integration, on-chip interconnects, and memory hierarchies are all anticipated in the near future.

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“…These are the challenges beyond simply placing components together. We need good strategies for the integration of hardware and software IP components [87].…”

Section: Ip Integrationmentioning

confidence: 99%

Trend and Challenge on System-on-a-Chip Designs

Chen

Kung

2007

J Sign Process Syst Sign Image Video Technol

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“…1) In order to encounter the issues of completion logic around IPs and portability, we experienced a handcrafted implementation and porting of a high throughput signal processing application onto FPGA platforms from different manufacturers, and compared different approaches to (semi-)automate such mappings. Then we derived requirements to improve such mappings from high-level specifications, separating and interfacing the data flow with the control flow in our domain.…”

Section: Lemaitre Alliot and Depretterementioning

confidence: 99%

“…Wagner et al [1] identified strategies and gave research directions for the integration of IP components in systems-on-chip altogether with the generation of an OS. The challenges of co-simulation and co-synthesis of IP-based designs are covered.…”

Section: Related Workmentioning

confidence: 99%

“…On one hand, this configurability is convenient for our approach since it gives freedom to specify our application from a highlevel without being dependent on a specific interface. On the other hand, as mentioned in [1], the OCP standard does not support mechanisms for arbitration or address decoding. This is a limitation when resources (such as IPs) must be shared.…”

Section: Standard Interfacesmentioning

confidence: 99%

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Requirements for Interfacing IP-Components in Re-configurable Platforms

Lemaitre

Alliot

Deprettere

2006

J VLSI Sign Process Syst Sign Image Video Technol

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When mapping large and high-throughput signal processing applications onto heterogeneous platforms, parts of these applications are assigned to re-configurable components. Automating such mappings without delving deep into details implies the (re-) use of IP components. When it comes to 1) relying on IP components in systemlevel and (re-configurable) platform-based design, and 2) porting of such designs across platforms, it is not well known how to integrate both IP libraries and portability requirements into the design flow. To investigate these uncertainties, we have conducted four case studies around the (re-)use and interfacing of IP components. One is focusing on the porting issue, one is dealing with a new automated task-level mapping method, one is evaluating a HW-SW commercially available co-design method, and one is about standardization of interfaces for IP wrapping. The case studies reveal the weakness of otherwise highly desirable system-level design methods when evaluated with respect to fast, accurate, and systematic IP integration.

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“…Modern SoCs are very complex and design is heavily based on reusable components [1], [2]. Currently, there are about 50 intellectual property (IP) components per chip [3] and integrating them efficiently calls for specialized design tools [4], [5] and standards, such as IP-XACT [6]. Figure 1 depicts an outline of modern product process, in which new platforms and new products overlap over time.…”

Section: Introductionmentioning

confidence: 99%

Applying IP-XACT in product data management

Salminen

Hämäläinen

Hännikäinen

2011

2011 International Symposium on System on Chip (SoC)

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Key challenge for industrial embedded system companies is product data management (PMD) of rapidly changing requirements, new platforms and own legacy intellectual property. This can be alleviated with IP component reuse methods, platform based design, and Model Driven Development (MDD) methodologies. We propose an open source product integration environment suitable for small and mid-size enterprises (SME) utilizing FPGAs. We extend the use of IP-XACT standard from HW integration at IP-level to board and chip level designs, describe SW as IP-XACT metadata objects, and add reusability status to objects for PDM. We do not modify or extend IP-XACT metadata format to maintain compatibility with standard compliant tools. Instead, we propose naming conventions and usage profiles. An exemplar FPGA-product shows feasibility in practice in our Kactus2 tool. The benefits are covering complete products including SW objects and HW/SW mappings while strictly keeping the standard XML format.

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Strategies for the integration of hardware and software IP components in embedded systems-on-chip

Cited by 22 publications

References 49 publications

Trend and Challenge on System-on-a-Chip Designs

Trend and Challenge on System-on-a-Chip Designs

Requirements for Interfacing IP-Components in Re-configurable Platforms

Applying IP-XACT in product data management

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