Mobility degradation due to interface traps in plasma oxynitride PMOS devices

Abstract

Mobility degradation due to generation of interface traps (Δμ eff (N IT )) is a well-known phenomenon that has been theoretically interpreted by several mobility models. Based on these analysis, there is a general perception that Δμ eff (N IT ) is relatively insignificant (compared to Δμ eff due to ionized impurity) and as such can be safely ignored for performance and reliability analysis. Here, we investigate the importance of considering Δμ eff (N IT ) for reliability analysis by analyzing a wide variety of plasma oxynitride PMOS devices using both parametric and physical mobility models. We find that contrary to popular belief this correction is fundamentally important for robust and uncorrupted estimates of the key reliability parameters like threshold-voltage shift, lifetime projection, voltage acceleration factor, etc. Therefore, in this paper, we develop a generalized algorithm for estimating Δμ eff (N IT ) for plasma oxynitride PMOS devices and systematically explore its implications for NBTI-specific reliability analysis.

A Comparative NBTI Study of $\hbox{HfO}_{2}$, $\hbox{HfSiO}_{x}$, and SiON p-MOSFETs Using UF-OTF $I_{\rm DLIN}$ Technique

“…1) clearly suggest presence or absence of large hole trapping (ΔV h ) component in N-related traps [4], [11], particularly at early stress time. As ΔV h saturates fast and has weaker T activation [3]- [5], [11], [12], it causes lower n ( Fig. 2) and E A (Fig.…”

“…1 for HfSiO x and HfO 2 devices for two different stress T and time-zero (t 0 ) delay. Note that ΔV is proportional to but different from ΔV T (obtained using SMS) as mobility degradation is not taken into account [12] 1 ; V GSTR is stress bias; V T 0 is prestress V T ; I DLIN0 is the peak I DLIN ; ΔI DLIN is degradation in I DLIN from I DLIN0 ; and t 0 delay implies delay between application of V GSTR and measurement of I DLIN0 [4]. Note that HfO 2 shows very high degradation at short stress time (submilliseconds) as compared to HfSiO x when measured using t 0 = 1 μs.…”

“…UF-SMS provides direct estimation of V T shift, although it cannot be used to measure degradation at very short stress time. UF-OTF can be used to determine degradation from very short (approximately microseconds) to long stress time, although it requires postprocessing to convert I DLIN degradation to V T shift as discussed in [12]. However, while NBTI in SiON p-MOSFETs has been studied using UF-SMS or UF-OTF techniques [4], [11], [13], to the best of our knowledge, most studies of NBTI in high-k p-MOSFETs [5]- [8] were done using conventional SMS and calls for a reevaluation by UF methods, particularly to probe the degradation at early stress time and to have recovery-artifact-free degradation at longer stress time.…”

The Impact of Nitrogen Engineering in Silicon Oxynitride Gate Dielectric on Negative-Bias Temperature Instability of p-MOSFETs: A Study by Ultrafast On-The-Fly $I_{\rm DLIN}$ Technique

“…Although the measurement is delay free, it suffers from two limitations. First, the device degradation is expressed as ∆V = −∆I DLIN /I DLIN0 * (V G,STRESS − V T 0 ) [13], [14], [19], [27], which is related but not equal to ∆V T , as mobility degradation is not taken into account [43], [44]. Second, the use of standard analyzer put a lower limit (∼1 ms) on the "time-zero" delay (t 0 delay), which is defined as delay between application of stress and measurement of the first I-V point (I DLIN0 ) at V G = V G,STRESS .…”

A Common Framework of NBTI Generation and Recovery in Plasma-Nitrided SiON p-MOSFETs

“…During recovery, transients were extracted at V G = V REC , and a similar expression was used (with V GSTR being replaced by V REC ), where V REC is the recovery bias applied after the removal of stress, and I DLIN0 is the first measurement point in time t 0 (again, 1 μs) after V G goes from V GSTR to V REC . Note that OTF ΔV T is proportional to but different from conventional ΔV T (obtained from transfer I-V sweeps), as mobility degradation is not taken into account [15]. ., yet to recover) during recovery (following different stress times), at identical stress/recovery E OX and T , for N = 42% and an EOT = 1.46-nm SiON device.…”