In this paper, we present mobility investigations of strained nMOS and pMOS short-channel transistors with dimensions down to 30-nm gate length. Using the geometrical magnetoresistance (MR) effect, carrier mobility of electrons and holes in the inversion channel of a recent state-of-the-art CMOS technology is presented from linear to saturation operation conditions. The MR effect allows for a more direct access to the carrier mobility compared with the conventional current/voltage and capacitance/voltage mobility derivation methods, in which series resistance, inversion charge density, and effective channel length are necessary to extract the mobility values of the shortchannel devices. In another way, the MR effect can help to disentangle the performance gain of the strained state-of-the art devices to changes in channel mobility or device connection, e.g., series resistance effects.