Mobile CPU power/performance benchmarking and process technology co-optimization

Abstract

The form factor of mobile devices and their associated thermal dissipation characteristics present practical limits to SoC (and specifically CPU) power consumption. Multiple maximum temperature constraints interact with the thermal "time constant" of package and product to limit allowable die temperature. This can constrain maximum CPU frequency in real use cases. The co-design of product and process technology is required to maximize thermally constrained performance. Technology features, device Ieff/Ioff setpoints, and circuit design styles are all levers to optimize thermally constrained performance. A methodology for early prediction of product sensitivities to these levers is required to enable their definition sufficiently early in the development cycle of the technology node.

Event-based thermal control for high-density processors

“…In the absence of control, sub-millimeter spots arise with temperatures swinging by tens of degrees in a few milliseconds. At these time scales, no off-chip cooling system can keep the pace, and onchip thermal management becomes vital to prevent destructive thermal runaways [4].…”