Mixed-Type Wafer Defect Recognition With Multi-Scale Information Fusion Transformer

Wei, Yuxiang; Wang, Huan

doi:10.1109/tsm.2022.3156583

Cited by 16 publications

(8 citation statements)

References 29 publications

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“…To do that, HDBSCAN embeds the usage of Minimum Spanning Tree (MST) approach [35], [38]. MST re-configures and reduces in complexity the input densely connected graph by a classical graph-theory approach which provides a new graph with a minimal set of edges that connects all the components 3 . An instance of MST optimized graph associated to an input Silicon Carbide WDMs is reported in Fig.…”

Section: ) Hierarchical Clustering Sub-systemmentioning

confidence: 99%

Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

et al. 2022

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The recent increasing demand of Silicon-on-Chip devices has had a significant impact on the industrial processes of leading semiconductor companies. The semiconductor industry is redesigning internal technology processes trying to optimize costs and production yield. To achieve this target a key role is played by the intelligent early wafer defects identification task. The Electrical Wafer Sorting (EWS) stage allows an efficient wafer defects analysis by processing the visual map associated to the wafer. The goal of this contribution is to provide an effective solution to perform automatic evaluation of the EWS defect maps. The proposed solution leverages recent approaches of deep learning both supervised and unsupervised to perform a robust EWS defect patterns classification in different device technologies including Silicon and Silicon Carbide. This method embeds an end-to-end pipeline for supervised EWS defect patterns classification including a hierarchical unsupervised system to assess novel defects in the production line. The implemented "Unsupervised Learning Block" embeds ad-hoc designed Dimensionality Reduction combined with Clustering and a Metrics-driven Classification sub-systems. The proposed "Supervised Learning Block" includes a Convolutional Neural Network trained to perform a supervised classification of the Wafer Defect Maps (WDMs). The proposed system has been tested and validated on different datasets, showing effective performance in the classification of the defect patterns (average accuracy about 97%).

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Section: ) Hierarchical Clustering Sub-systemmentioning

confidence: 99%

Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

et al. 2022

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“…This information can help engineers quickly respond to the possible causes of wafer defects and adjust the process to reduce the yield of unqualified wafers [9]. Due to the ever-increasing demand for wafer yields in the semiconductor industry, the original engineers' visual inspection methods were not efficient enough to meet production demands [7]. Therefore, we need a system that automates wafer defect classification (WDC) tasks to replace manual labor and achieve higher production efficiency.…”

Section: Introductionmentioning

confidence: 99%

“…Kyeong et al [11] introduced a CNN model to classify mixed defect patterns within the framework of a separate classification model for each defect pattern and prosing a solution to the classification problem of mixed mix-type defect categories. Wei et al [7] proposed an MSF-Network to focus on the detailed features of the wafer map, which fully integrates the advantages of convolutional networks and transformers in detailed feature learning and global feature learning.…”

Section: Introductionmentioning

confidence: 99%

“…Because wafer fabrication is done in a highly automated and dust-free environment, the proportion of defective wafers is small relative to the normal ones. Since hundreds of complex processes are involved in wafer manufacturing, errors in different processes can lead to different types of wafer defects [7,16]. Also, the occurrence of defects varies due to the differences between manufacturing processes.…”

Section: Introductionmentioning

confidence: 99%

“…Moreover, this information is likely to be part of a physically significant wafer's overall defect signature. This results in unclear defect features of the generated image [7]. (c) Ambiguity.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A class imbalanced wafer defect classification framework based on variational autoencoder generative adversarial network

Wang¹,

Wei²,

Wang³

2022

Meas. Sci. Technol.

Self Cite

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Wafer Defect Classification (WDC) can be crucial to the wafer fabrication process. Engineers can quickly respond to improve the technological process, averting further defects through WDC. However, due to the complex fabrication steps, wafer defects are different in various types. This causes a severe data imbalance problem in WDC. To effectively solve the problem, this study introduces a class imbalanced wafer defect classification framework (CI-WDC) based on Variational Autoencoder Generative Adversarial Network (VAE-GAN). This framework consists of VAE-GAN and wafer defect classifier. Among them, VAE-GAN is responsible for creating new samples to solve the imbalance problem while the classifier is responsible for classifying wafer defect patterns. Specifically, VAE-GAN combines the advantage of a variational autoencoder (VAE) and generative adversarial network. VAE networks can produce subtle differences that do not affect the properties of the data when generating new images. At the same time, the proposed discriminator can help us constrain the generated images to be close to real samples and avoid irrational, feature-missing, and ambiguous samples. WM-811K dataset is utilized to verify the above method. The experimental results validate that the samples generated by VAE-GAN have a significant improvement in the performance of the WDC system.

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Image-Multimodal Data Analysis for Defect Classification: Case Study of Industrial Printing

Itou

Watanabe

Arima

2023

Smart Innovation, Systems and Technologies

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Mixed-Type Wafer Defect Recognition With Multi-Scale Information Fusion Transformer

Cited by 16 publications

References 29 publications

Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

Explainable Deep Learning System for Advanced Silicon and Silicon Carbide Electrical Wafer Defect Map Assessment

A class imbalanced wafer defect classification framework based on variational autoencoder generative adversarial network

Image-Multimodal Data Analysis for Defect Classification: Case Study of Industrial Printing

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