Minimization of dark counts in PureB SPADs for NUV/VUV/EUV light detection by employing a 2D TCAD-based simulation environment

Abstract

PureB single-photon avalanche diodes (SPADs) were investigated with the aid of a newly developed TCAD-based numerical modeling method with which characteristics related to the avalanching behavior can be simulated. The p + region forming the anode of the PureB p + n photodiode is extremely shallow, only a few nanometer deep, which is essential for obtaining a high photon detection efficiency (PDE) for near-, vacuum-and extreme-ultraviolet (NUV/VUV/EUV) light detection but when an implicit guard ring (GR) is implemented, the dark count rate (DCR) can, despite the GR, be deteriorated at the very sharp corners of the p +-region where there is a high concentration of the electric-field. By comparing measurements to simulations, the main mechanism dominating the DCR in the PureB SPADs was identified as band-toband tunneling (BTBT) while trap-assisted-tunneling also plays a role when the perimeter breakdown is low. Increasing the dose of carriers in the enhancement region negatively impacts the total DCR of the device, but also shifts the origin of the dominant DCR contribution from perimeter to the active region. The simulations for optimization of the SPAD geometry predict that a modification of the n-doped epitaxial region of the PureB SPADs could decrease the DCR by almost two orders of magnitude. This is achieved by increasing the n-epi-layer thickness from 1 µm to 3 µm and lowering the doping from 10 15 cm-3 to 10 14 cm-3. A high electric field at the vertical pn junction in the active region can also be minimized by modifying the implantation parameters of the n-enhancement region thus keeping the BTBT contribution to the DCR sufficiently low.

Low-Temperature Electrical Performance of PureB Photodiodes Revealing Al-Metallization-Related Degradation of Dark Currents

“…Despite the almost three decades higher dark currents of the SPAD6-N devices, an abrupt breakdown occurs at the same voltage, 13.5-13.8 V, in both cases. This demonstrates the effectiveness of using an implicit GR configuration to set the breakdown away from the more defect-prone perimeter region [26].…”

“…1(c), was implemented by the implantation of phosphorus (P ++ ) in the central region of the diode. This sets the breakdown voltage away from the perimeter as described in detail in [26].…”

Identifying nano-Schottky diode currents in silicon diodes with 2D interfacial layers

“…The design of large photodiodes with p + n junction anodes mainly includes the use of guard rings to mitigate high electric fields often associated with the strong curvature of diffused regions at the diode perimeter. Such high electric fields also occur at the perimeter of PureB diodes [15]. In addition, these diodes can also be degraded by imperfect B coverage of the Si at the perimeter.…”