Abstract:Pure boron (PureB) deposition as the anode region of Si photodiodes creates negative fixed charge at the boron/silicon interface, which is responsible for effective suppression of electron injection from the bulk, thus ensuring low saturation/dark current densities. This mechanism is shown here to remain effective when PureB diodes, fabricated at 700 • C, are operated at cryogenic temperatures down to 100 K. Although the PureB junctions were only a few nanometers deep, they displayed the same current-voltage (… Show more
“…The junction termination at the oxide perimeter can be a source of g-r leakage current that generally has n 2 and thus becomes more pronounced at low temperatures. In addition, weak spots in the B-layer can allow the Al-metallization to locally approach/contact the Si, forming nano-regions with Schottky-like high currents [8,9]. The latter effect also results in an increasing n value as the temperature decreases because the parasitic Schottky currents decrease less rapidly with temperature.…”
Section: Resultsmentioning
confidence: 99%
“…Both the BJT and 2-diode measurements are attenuated by the series resistance through the ~ 4-nm-thick bulk B-layer. This series resistance increases with decreasing temperature [9], leading to a decreased voltage window with the desired ideal I-V characteristics.…”
Section: Resultsmentioning
confidence: 99%
“…3b, becomes very high at this temperature because the temperature-dependent decrease of the electron current is lower than that of the hole current. The hole current is completely governed by the bandgap of the Si substrate, while the electron current is influenced by the much lower bandgap of the Al-metallization [9]. In Fig.…”
Section: Resultsmentioning
confidence: 99%
“…One of the studied diodes fabricated with a 5-min B-deposition is a good example of a low-saturation-current PureB diode, having an approximately 4-nm-thick B-layer. Another B-layer diode, has, after 1 s B-deposition time, only a fraction of a monolayer B coverage which results in about 10 times higher saturation current due to the proximity of the Al metal layer to the Si surface [8,9]. In addition, a 30 s P-deposition was applied, which is known to form a self-limiting monolayer on the Si surface [10] as well as a slight n-doping of the Si surface.…”
Two hole-current extraction methods are discussed as potential checks on temperature during on-wafer I-V characterization of Si diodes made with 2-D interfacial layers on n-substrates. Both methods are unaffected by leakage currents related to defects near the junction. The one method is commonly used: the slope of the collector current in a lateral pnp Gummel plot is determined. The validity of this method is limited by series resistance and Early-voltage/punch-through effects related to depletion of the base region. The other method applies a differential measurement to determine a hole spreading current with an ideal slope. This method is not limited by depletion width variations but if the electron-to-hole current-ratio is too high, detrimental parasitic electron currents are induced.
“…The junction termination at the oxide perimeter can be a source of g-r leakage current that generally has n 2 and thus becomes more pronounced at low temperatures. In addition, weak spots in the B-layer can allow the Al-metallization to locally approach/contact the Si, forming nano-regions with Schottky-like high currents [8,9]. The latter effect also results in an increasing n value as the temperature decreases because the parasitic Schottky currents decrease less rapidly with temperature.…”
Section: Resultsmentioning
confidence: 99%
“…Both the BJT and 2-diode measurements are attenuated by the series resistance through the ~ 4-nm-thick bulk B-layer. This series resistance increases with decreasing temperature [9], leading to a decreased voltage window with the desired ideal I-V characteristics.…”
Section: Resultsmentioning
confidence: 99%
“…3b, becomes very high at this temperature because the temperature-dependent decrease of the electron current is lower than that of the hole current. The hole current is completely governed by the bandgap of the Si substrate, while the electron current is influenced by the much lower bandgap of the Al-metallization [9]. In Fig.…”
Section: Resultsmentioning
confidence: 99%
“…One of the studied diodes fabricated with a 5-min B-deposition is a good example of a low-saturation-current PureB diode, having an approximately 4-nm-thick B-layer. Another B-layer diode, has, after 1 s B-deposition time, only a fraction of a monolayer B coverage which results in about 10 times higher saturation current due to the proximity of the Al metal layer to the Si surface [8,9]. In addition, a 30 s P-deposition was applied, which is known to form a self-limiting monolayer on the Si surface [10] as well as a slight n-doping of the Si surface.…”
Two hole-current extraction methods are discussed as potential checks on temperature during on-wafer I-V characterization of Si diodes made with 2-D interfacial layers on n-substrates. Both methods are unaffected by leakage currents related to defects near the junction. The one method is commonly used: the slope of the collector current in a lateral pnp Gummel plot is determined. The validity of this method is limited by series resistance and Early-voltage/punch-through effects related to depletion of the base region. The other method applies a differential measurement to determine a hole spreading current with an ideal slope. This method is not limited by depletion width variations but if the electron-to-hole current-ratio is too high, detrimental parasitic electron currents are induced.
“…Otherwise, the high excess currents were about a decade or so higher than the ideal p + n currents and the kinked behavior was evident. We believe that it is caused by high-injection effects at the nano-Schottky junction [12,14].…”
Section: A Statistical I-v Characterizationmentioning
In silicon technology, Schottky diodes mainly exhibit high current levels, and attempts are regularly made to reduce these by introducing 2D layers between the metal contact and the silicon. Defects in such interfacial layers, from weakly bonded structures to actual pinholes, can lead to high, localized metal-semiconductor Schottky currents. Using the example of diodes with an interfacial layer of pure boron (PureB) between an aluminum metallization layer and the Si, a signature for such "nano-Schottky's" is determined by evaluating the results of several different test-structure arrays and measurement techniques. An adapted bipolar-type measurement is introduced as an additional method to determine whether any high current characteristics originate from a low Schottky barrier height over the entire diode surface or from a localized nano-Schottky structure.
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