Minimization of crosstalk noise and delay using reduced graphene nano ribbon (GNR) interconnect

Bhattacharya, Sandip; Das, Subhajit; Tayal, Shubham; Ajayan, J.; Joseph, Leo; Juluru, Tarun Kumar; Mukhopadhyay, Abhiroop; Kanungo, Sayan; Das, Debaprasad; Rebelli, Shashank

doi:10.1016/j.mejo.2022.105533

Cited by 3 publications

(2 citation statements)

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“…For the future generation of high performance integrated circuit (IC) design, Sandip Bhattacharya et al 13 submitted a work on a sidecontact reduced graphene nano-ribbon (SC-RGNR) connection model to decrease crosstalk noise and latency. According to experimental study, the SC-RGNR interconnect, which is based on a higher MFP, exhibits less dynamic delay than the SC-GNR interconnect for both the STD and STAGG interconnect models under both the best-and worst-case switching conditions (SP5) (SP2).…”

Section: Effect On Noise Due To Interconnectsmentioning

confidence: 99%

“…Scaling Effect for rising Nanoscale Interconnect material is the topic of a research publication by Kai Zhao et al 14 Future nodes in the M0 and M1 layers will have significant difficulties as a result of the resistivity of Cu interconnects increasing quickly with continuous reduction due to scatterings. For the purpose of analysing the GNR,CNT [13][14][15] Ballistic transport Integration/contact resistance TSMC behaviours of electron transport, a Boltzmann-transport-equationbased Monte Carlo simulator is created. This simulator includes all of the significant interconnect scattering processes.…”

Section: Effect On Noise Due To Interconnectsmentioning

confidence: 99%

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A Comparative Study and Analysis of Various Interconnects for Very Large-Scale Integration

Susaritha

2023

ECS Adv.

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We examined various interconnects utilised in very large-scale integration (VLSI). The expanding use of portable devices has increased the demand for low-power circuit design. Sub-threshold circuits are the greatest option to address the demand for even more-low power. However, decreased performance and increased variability are the main problems with sub-threshold circuits. Furthermore, global interconnects have a significant impact on the performance and power dissipation of sub-threshold circuits. For future VLSI circuit applications, interconnect is a brand-new and very promising alternative for which the propagation latency and stability must be analysed in order to substantiate its claim that it can replace existing interconnect designs.

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Section: Effect On Noise Due To Interconnectsmentioning

confidence: 99%