Minimalistic SDHC-SPI hardware reader module for boot loader applications

Ruiz-de-Clavijo, P.; Ostúa, E.; Bellido, M.J.; Juan, J.; Viejo, J.; Guerrero, David

doi:10.1016/j.mejo.2017.07.007

Cited by 5 publications

(3 citation statements)

References 6 publications

(8 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Table 7 presents the results of string validation for groups of files that have gone through the transfer process (Ctrl+X), there are 9 files that can be recovered by foremost, but 5 of them do not have the same hash value as the original file, then the file is declared invalid or has been manipulated, the remaining 6 files cannot be found. Valid file pdf (5) Not Found (Null) file pdf (6) Not Found (Null) filevideo (4) Not Found (Null) filevideo (5) Not Found (Null) filevideo (6) Not Found (Null) file winrar ( 4…”

Section: Discussionmentioning

confidence: 99%

“…300,000,000,-(three hundred million rupiahs) [2], the digital evidence, in this case, is in the form of 5 files presented in Table 1; there are various types of file extensions stored on SDHC, namely three compressed files in .zip format and two database files ad1 format, The entire file was in one of the confiscated evidence, namely the defendant's SDHC storage card. [4]; based on this capability, not all devices can use SDHC; as a small, thin and large storage device [5], SDHC storage hardware is a minimalist and multifunctional storage device, as shown in the Figure . 2. In cases involving AUS, the data on SDHC can be deleted, transferred or changed; the data is required to verify the authenticity of digital evidence with a digital forensic process.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Digital Forensic on Secure Digital High Capacity using DFRWS Method

Yudhana¹,

Riadi²,

Putra³

2022

J. RESTI (Rekayasa Sist. Teknol. Inf.)

View full text Add to dashboard Cite

As evidenced in the trial, between 2015 and the second quarter of 2022, there were 54 cases involving secure digital high capacity (SDHC) storage hardware as evidenced in trials. In 2021 there will be an increase in cases involving SDHC. The three cases with the highest number are corruption cases, special crimes, and ITE. SDHC is an advanced technology development of Secure Digital (SD) card hardware which functions as storage. SD Card only has a capacity of up to 2 gigabytes, while the largest SDHC capacity is 32 gigabytes. As a storage device that is small, thin, and has a fairly large capacity. this research needs to be done because of the increasingly widespread increase in cases involving SDHC. This study aims to perform digital forensic analysis on SDHC evidence using forensic applications that run on Linux, namely foremost and DC3DD. This study uses the DFRWS method to retrieve valid evidence in court. Based on the research conducted, it was found that the number of files that can be restored at the examination stage using foremost is 77%, and the accuracy of recovered files is 50% with string file hash validation. From this research, it can be concluded that the processing results of DC3DD and Foremost can be used as valid evidence.

show abstract

Section: Discussionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Digital Forensic on Secure Digital High Capacity using DFRWS Method

Yudhana¹,

Riadi²,

Putra³

2022

J. RESTI (Rekayasa Sist. Teknol. Inf.)

View full text Add to dashboard Cite

show abstract

“…Regards to the submodules of the Autotest Core, the Control Unit it is detailed below. However, the Flash R/W module is a modified version of the minsdhost module described in [25]; the differences are:…”

Section: Autotest Corementioning

confidence: 99%

An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation

Cano-Quiveu

Ruiz-de-Clavijo-Vazquez

Bellido

et al. 2021

IEEE Access

View full text Add to dashboard Cite

This paper introduces a design and on-chip verification framework for IPCores in FPGA platforms. The methodology of the proposed framework is based on the development of a high level software model, an HDL description of the IPCore and the verification of the system under test by the Autotest Core, an onchip verification core developed for this framework. The test pattern generation is done at the high level in software and used throughout the design and verification process. HDL simulation results can then be compared to on-chip results and get performance measurements from the Autotest Core. The Off-line testing is possible by using standard low-cost Flash storage (SD card). The proposed framework and methodology applied to PRESENT and SPONGENT cryptographic algorithms has shown over two orders of magnitude better performance than commercial tools like Xilinx's VIO and a hardware footprint of the verification cored below 3% of the available FPGA resources.

show abstract