Millimeter-wave FET modeling using on-wafer measurements and EM simulation

Cidronali, Alessandro; Collodi, Giovanni; Santarelli, Alberto; Vannini, G.; Manes, G.

doi:10.1109/22.982219

Cited by 30 publications

(20 citation statements)

References 31 publications

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“…The R s and R d are 1.7 Ω and 3 Ω, respectively, which are consistent with the values determined from DC measurement because the parasitic resistance of the metal electrode is not influenced by the skin effect within the operating frequency. The extrinsic parameters are also extracted from the EM simulation results . Both results from measurement and simulation are in good agreement.…”

Section: Experiments and Discussionmentioning

confidence: 99%

Three‐port cascade de‐embedding methodology with the dangling leg effect considered for pHEMT electron trapping characterization at microwave frequency

Lee

Lin

2013

Micro & Optical Tech Letters

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A three‐port cascade de‐embedding procedure utilized to accurately eliminate the source dangling leg effect of a pseudomorphic High Electron Mobility Transistor (pHEMT) test structure without shielding is presented. The measured device under test (DUT) is de‐embedded by using the experimental and electromagnetic (EM) simulated data of dummy structures and their difference is below 1%. In addition, the extracted equivalent circuit parameters of the pHEMT exhibit the frequency‐independent characteristics, indicating the dangling leg parasitic is removed accurately. These demonstrate that the presented three‐port cascade de‐embedding method is valid so that the de‐embedded results of the pHEMT can reflect the physical electron trapping effect at microwave frequency. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:77–83, 2014

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Section: Experiments and Discussionmentioning

confidence: 99%

Three‐port cascade de‐embedding methodology with the dangling leg effect considered for pHEMT electron trapping characterization at microwave frequency

Lee

Lin

2013

Micro & Optical Tech Letters

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“…Comprehensive strategies that use EM analysis for modelling the access network have been developed with very encouraging results. 4,5 In principal, methods based on EM simulation have the potential to allow a great flexibility in modelling the device geometry since a full description of the access network can be accounted for during EM simulation. Of course, EM analysis can be computationally expensive and real-time tuning of the device geometry would not be feasible using a full EM description of the device.…”

Section: Electromagnetic Analysis Applied To Access Network Modellingmentioning

confidence: 99%

Geometric dependence of the parasitic components and thermal properties of HEMTs

Vun

Parker

Mahon³

et al. 2007

Microelectronics: Design, Technology, and Packaging III

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For integrated circuit design up to 50GHz and beyond accurate models of the transistor access structures and intrinsic structures are necessary for prediction of circuit performance. The circuit design process relies on optimising transistor geometry parameters such as unit gate width, number of gates, number of vias and gate-to-gate spacing. So the relationship between electrical and thermal parasitic components in transistor access structures, and transistor geometry is important to understand when developing models for transistors of differing geometries. Current approaches to describing the geometric dependence of models are limited to empirical methods which only describe a finite set of geometries and only include unit gate width and number of gates as variables. A better understanding of the geometric dependence is seen as a way to provide scalable models that remain accurate for continuous variation of all geometric parameters. Understanding the distribution of parasitic elements between the manifold, the terminal fingers, and the reference plane discontinuities is an issue identified as important in this regard. Examination of dc characteristics and thermal images indicates that gate-togate thermal coupling and increased thermal conductance at the gate ends, affects the device total thermal conductance. Consequently, a distributed thermal model is proposed which accounts for these effects. This work is seen as a starting point for developing comprehensive scalable models that will allow RF circuit designers to optimise circuit performance parameters such as total die area, maximum output power, power-added-efficiency (PAE) and channel temperature/lifetime.

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“…Since no straightforward scaling rules exist for the extrinsic networks, there have been researches to employ a Full-Wave Electo-Magnetic (FW-EM) simulation to extract layoutdependent extrinsic parameters [2]- [4]. However, these works have so far been limited to GaAs HEMT devices, and few attempts have been made to build a scalable CMOS FET model including the layout-dependent extrinsic elements.…”

Section: Introductionmentioning

confidence: 99%

Scalable small-signal modeling of RF CMOS FET based on 3-D EM-based extraction of parasitic effects

Jung

Choi

Kwon

2009

2009 IEEE MTT-S International Microwave Symposium Digest

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An accurate scalable RF CMOS model applicable to high frequencies is developed using 3-D EM-based extraction of parasitic elements for the first time. Due to multi-metal layers, vertical interconnects, substrate loss and substrate-contact rings, the extrinsic parasitic network of CMOS FET is more complicated than GaAs FET's and does not follow simple scaling rules. A pair of dummy patterns with different reference planes and 3-D EM simulations are sequentially used to extract the pads, vertical interconnects and extrinsic parasitic network. A new scaling rule is proposed for the layout-dependent extrinsic network parameters. A complete scalable RF CMOS model is validated by comparing the predicted and measured Sparameters of the scaled devices from a family of 0.18 μm CMOS FET's up to 50GHz, which resulted in less than 2% error. The method is useful in choosing the optimum device geometry for a given circuit application.

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Millimeter-wave FET modeling using on-wafer measurements and EM simulation

Cited by 30 publications

References 31 publications

Three‐port cascade de‐embedding methodology with the dangling leg effect considered for pHEMT electron trapping characterization at microwave frequency

Three‐port cascade de‐embedding methodology with the dangling leg effect considered for pHEMT electron trapping characterization at microwave frequency

Geometric dependence of the parasitic components and thermal properties of HEMTs

Scalable small-signal modeling of RF CMOS FET based on 3-D EM-based extraction of parasitic effects

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