Microparticle photometry in a CMOS microsystem combining magnetic actuation and in situ optical detection

Lehmann, Ulrike; Migliore, Sergio; Pietrocola, S.; Dupont, E.; Niclass, Cristiano; Gijs, Martin A. M.; Charbon, Edoardo

doi:10.1016/j.snb.2007.10.021

Cited by 17 publications

(9 citation statements)

References 21 publications

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“…These microsystems have employed optical 1-3 , electrochemical 4, 5 , electrical 6-8 and magnetic 9-11 sensors or actuators. Electrochemical microsystems for example, are capable of populating over one thousand sensors on a CMOS die 12 .…”

Section: Introductionmentioning

confidence: 99%

Lab-on-CMOS integration of microfluidics and electrochemical sensors

2013

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This paper introduces a CMOS-microfluidics integration scheme for electrochemical microsystems. A CMOS chip was embedded into a micro-machined silicon carrier. By leveling the CMOS chip and carrier surface to within 100 nm, an expanded obstacle-free surface suitable for photolithography was achieved. Thin film metal planar interconnects were microfabricated to bridge CMOS pads to the perimeter of the carrier, leaving a flat and smooth surface for integrating microfluidic structures. A model device containing SU-8 microfluidic mixers and detection channels crossing over microelectrodes on a CMOS integrated circuit was constructed using the chip-carrier assembly scheme. Functional integrity of microfluidic structures and on-CMOS electrodes was verified by a simultaneous sample dilution and electrochemical detection experiment within multi-channel microfluidics. This lab-on-CMOS integration process is capable of high packing density, is suitable for wafer-level batch production, and opens new opportunities to combine the performance benefits of on-CMOS sensors with lab-on-chip platforms.

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Section: Introductionmentioning

confidence: 99%

Lab-on-CMOS integration of microfluidics and electrochemical sensors

2013

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“…Biological samples can be moved on chip by fluidic convection, by electric [35] and/or magnetic [69] means. Micro/nanopumps can be realized on chip as well as channels on layers above functionalized silicon or amorphous material.…”

Section: A Loc Designmentioning

confidence: 99%

An Outlook on Design Technologies for Future Integrated Systems

Micheli

2009

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-The economic and social demand for ubiquitous and multifaceted electronic systems-in combination with the unprecedented opportunities provided by the integration of various manufacturing technologies-is paving the way to a new class of heterogeneous integrated systems, with increased performance and connectedness and providing us with gateways to the living world. This paper surveys design requirements and solutions for heterogeneous systems and addresses design technologies for realizing them.

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“…Attempts to realize CMOS-integrated microfluidic devices have been made, aiming to reduce microfabrication and packaging costs. However, traditional footprints of microfluidic devices have been an order-of-magnitude larger than those of CMOS devices and integration of these two technologies generally is difficult, [1][2][3] packaging and integration constituting major costs. An optimum hybrid integration process requires low-temperature bonding without any pre-bonding processing on the CMOS side, which is not the case for existing anodic, 4 eutectic 5 or fusion 6 bonding.…”

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confidence: 99%

Parylene to silicon nitride bonding for post-integration of high pressure microfluidics to CMOS devices

Çiftlik

Gijs

2012

Lab Chip

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High pressure-rated channels allow microfluidic assays to be performed on a smaller footprint while keeping the throughput, thanks to the higher enabled flow rates, opening up perspectives for cost-effective integration of CMOS chips to microfluidic circuits. Accordingly, this study introduces an easy, low-cost and efficient method for realizing high pressure microfluidics-to-CMOS integration. First, we report a new low temperature (280 °C) Parylene-C wafer bonding technique, where O(2) plasma-treated Parylene-C bonds directly to Si(3)N(4) with an average bonding strength of 23 MPa. The technique works for silicon wafers with a nitride surface and uses a single layer of Parylene-C deposited only on one wafer, and allows microfluidic structures to be easily formed by directly bonding to the nitride passivation layer of the CMOS devices. Exploiting this technology, we demonstrated a microfluidic chip burst pressure as high as 16 MPa, while metal electrode structures on the silicon wafer remained functional after bonding.

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Microparticle photometry in a CMOS microsystem combining magnetic actuation and in situ optical detection

Cited by 17 publications

References 21 publications

Lab-on-CMOS integration of microfluidics and electrochemical sensors

Lab-on-CMOS integration of microfluidics and electrochemical sensors

An Outlook on Design Technologies for Future Integrated Systems

Parylene to silicon nitride bonding for post-integration of high pressure microfluidics to CMOS devices

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