Microelectronics Packaging—An Overview

Rymaszewski, Eugene J.; Tummala, Rao; Watari, Toshihiko

doi:10.1007/978-1-4615-6041-8_1

Cited by 3 publications

(5 citation statements)

References 9 publications

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“…Flip-chip interconnection directly connects different types of electronic components by using conductive solder bumps on the chip instead of wires. 3, 4, 7 As described earlier, flip-chip interconnection is an area-array configuration in which the chip with solder bumps on the appropriate connective spots is aligned in such a way that these spots meet the corresponding connectors on the external circuit. The connection is completed by reflow which involves heating the assembly in an inert atmosphere.…”

Section: Flip-chip Interconnectionmentioning

confidence: 99%

“…Electronic packaging establishes interconnections with electrical components such as transistors, diodes, capacitors, and resistors to form circuits. 3, 4 The individual circuits must be interconnected to form functional entities. A chip communicates with other chips in the circuit through an input/output (I/O) system of interconnects, and the chip and its circuitry are dependent on the package for support and protection.…”

Section: Introductionmentioning

confidence: 99%

“…The key objective of microelectronic packaging is to ensure that the chips and interconnections are packaged efficiently and reliably. 3, 4…”

Section: Introductionmentioning

confidence: 99%

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Manufacturing processes for fabrication of flip-chip micro-bumps used in microelectronic packaging: An overview

Datta

2019

Journal of Micromanufacturing

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Electronic packaging is the methodology for connecting and interfacing the chip technology with a system and the physical world. The objective of packaging is to ensure that the devices and interconnections are packaged efficiently and reliably. Chip–package interconnection technologies currently used in the semiconductor industry include wire bonding, tape automated bonding and flip-chip solder bump connection. Among these interconnection techniques, the flip-chip bumping technology is commonly used in advanced electronic packages since this interconnection is an area array configuration so that the entire surface of the chip can be covered with bumps for the highest possible input/output (I/O) counts. The present article reviews the manufacturing processes for the fabrication of flip-chip bumps for chip–package interconnection. Various solder bumping technologies used in high-volume production include evaporation, solder paste screening and electroplating. Evaporation process produces highly reliable bumps, but it is extremely expensive and is limited to lead or lead-rich solders. Solder paste screening is cost-effective, but issues related to excessive void formation limits the process to low-end products. On the other hand, electrochemical fabrication of flip-chip bumps is an extremely selective and efficient process, which is extendible to finer pitch, larger wafers and a variety of solder compositions, including lead-free alloys. Electrochemically fabricated copper pillar bumps offer fine pitch capabilities with excellent electromigration performance. Due to these virtues, the copper pillar bumping technology is emerging as a lead-free bumping technology option for high-performance electronic packaging.

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Section: Flip-chip Interconnectionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Manufacturing processes for fabrication of flip-chip micro-bumps used in microelectronic packaging: An overview

Datta

2019

Journal of Micromanufacturing

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“…1,2 For convenience and simplicity of device assembly as well as for reliability, it is desirable to carry out a direct and strong bonding onto these electronic, optical, thermal, and other inorganic materials. Microelectromechanical systems (MEMS) and optical/optoelectronic devices often contain Si, silicon oxide, and associated dielectric materials.…”

Section: Introductionmentioning

confidence: 99%

Rare-earth-enabled universal solders for microelectromechanical systems and optical packaging

Jin

2003

Journal of Elec Materi

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In packaging of microelectromechanical systems (MEMS), optical, and electronic devices, there is a need to directly bond a wide variety of inorganic materials, such as oxides, nitrides, and semiconductors. Such applications involve hermetic-sealing components, three-dimensional MEMS assembly components as well as active semiconductor or optical components, dielectric layers, diffusion barriers, waveguides, and heat sinks. These materials are known to be very difficult to wet and bond with low melting-point solders. New Sn-Ag-or Au-Sn-based universal solders doped with a small amount of rare-earth (RE) elements have been developed, which now allow direct and powerful bonding onto the surfaces of various MEMS, optical, or electronic device materials. The microstructure, interface properties, and mechanical behavior of the bonds as well as the potential packaging applications of these new solder materials for MEMS and optical fiber devices are described. Various packaging-related structural, thermal, or electrical issues in MEMS are also discussed.

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“…1 Telecommunication optical fibers need to be bonded on an assembly substrate with submicron accuracy and stability in alignment with respect to lasers and other optoelectronic components to ensure and maximize optical-signal transmission. Electronic devices generally contain base-semiconductor materials (such as Si, GaAs, SiC, and doped diamond), diffusion barriers (such as TiN and TaN), dielectrics (such as SiO 2 , Ta 2 O 5 , and Si 3 N 4 ), electrical conductors (such as Al, W, Cu, and CoSi 2 ), as well as heat-sink materials (such as Al, AlN, and diamond).…”

Section: Introductionmentioning

confidence: 99%