2014 IEEE International Symposium on Circuits and Systems (ISCAS) 2014
DOI: 10.1109/iscas.2014.6865179
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Memristor modelling

Abstract: In this paper, we show a simple circuit setup for experimentally plotting the v − i nontransversal pinched-hysteresis Lissajous fingerprint of a physical memristor -the common fluorescent gas discharge tube. The setup helped us investigate the effects of physical parasitics (inductors and capacitors) on the memristor v − i.

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Cited by 10 publications
(4 citation statements)
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“…Based on the direction of I – V response and the switching direction (Figures S1 and S2 and details given in Supplementary Note 1), the I – V curves of this model exhibits, in total, eight types of nonpinched characteristic behavior, namely, C 1 M 1 , C 1 M 2 , C 1 M 3 , C 1 M 4 , C 2 M 1 , C 2 M 2 , C 2 M 3 , and C 2 M 4 , as shown in Figure . Among these nonlinear nonpinched I – V hysteresis behaviors, C 1 M 1 , C 1 M 2 , and C 1 M 4 have be found in some experimental reports. Although the C 1 M 3 type I – V curve has not yet been reported, as far as we know, the similar C 2 M 4 type I – V curve has already been described by circuit simulation . To the best of our knowledge, the results in Figure contain all reported nonpinched I – V hysteretic behaviors thus far known, strongly supporting the validity of our simulation.…”
supporting
confidence: 83%
“…Based on the direction of I – V response and the switching direction (Figures S1 and S2 and details given in Supplementary Note 1), the I – V curves of this model exhibits, in total, eight types of nonpinched characteristic behavior, namely, C 1 M 1 , C 1 M 2 , C 1 M 3 , C 1 M 4 , C 2 M 1 , C 2 M 2 , C 2 M 3 , and C 2 M 4 , as shown in Figure . Among these nonlinear nonpinched I – V hysteresis behaviors, C 1 M 1 , C 1 M 2 , and C 1 M 4 have be found in some experimental reports. Although the C 1 M 3 type I – V curve has not yet been reported, as far as we know, the similar C 2 M 4 type I – V curve has already been described by circuit simulation . To the best of our knowledge, the results in Figure contain all reported nonpinched I – V hysteretic behaviors thus far known, strongly supporting the validity of our simulation.…”
supporting
confidence: 83%
“…The capacitance effect can occur when there is a large accumulation of positive and negative ions at the interfaces between the electrodes and the functional layer. A model proposed within the literature to replicate the I-V response is that of an ideal memristor and capacitor in parallel, as demonstrated previously in the case for the presence of a parasitic capacitance [15]. However, the planar architecture Fig.…”
Section: Resultsmentioning
confidence: 94%
“…1. An effect of a parasitic element is that voltage and current cannot be equal to zero simultaneously [29] and as a result, the pinch point will not pass through the origin. It is also worth noticing that resistance in parallel or in series with the memristor is not discussed since the equivalent circuit itself will be a memristor [23].…”
Section: Discussionmentioning
confidence: 99%