Memristor-CMOS Hybrid Neuron Circuit with Nonideal-Effect Correction Related to Parasitic Resistance for Binary-Memristor-Crossbar Neural Networks

Abstract

Voltages and currents in a memristor crossbar can be significantly affected due to nonideal effects such as parasitic source, line, and neuron resistance. These nonideal effects related to the parasitic resistance can cause the degradation of the neural network’s performance realized with the nonideal memristor crossbar. To avoid performance degradation due to the parasitic-resistance-related nonideal effects, adaptive training methods were proposed previously. However, the complicated training algorithm could add a heavy computational burden to the neural network hardware. Especially, the hardware and algorithmic burden can be more serious for edge intelligence applications such as Internet of Things (IoT) sensors. In this paper, a memristor-CMOS hybrid neuron circuit is proposed for compensating the parasitic-resistance-related nonideal effects during not the training phase but the inference one, where the complicated adaptive training is not needed. Moreover, unlike the previous linear correction method performed by the external hardware, the proposed correction circuit can be included in the memristor crossbar to minimize the power and hardware overheads for compensating the nonideal effects. The proposed correction circuit has been verified to be able to restore the degradation of source and output voltages in the nonideal crossbar. For the source voltage, the average percentage error of the uncompensated crossbar is as large as 36.7%. If the correction circuit is used, the percentage error in the source voltage can be reduced from 36.7% to 7.5%. For the output voltage, the average percentage error of the uncompensated crossbar is as large as 65.2%. The correction circuit can improve the percentage error in the output voltage from 65.2% to 8.6%. Almost the percentage error can be reduced to ~1/7 if the correction circuit is used. The nonideal memristor crossbar with the correction circuit has been tested for MNIST and CIFAR-10 datasets in this paper. For MNIST, the uncompensated and compensated crossbars indicate the recognition rate of 90.4% and 95.1%, respectively, compared to 95.5% of the ideal crossbar. For CIFAR-10, the nonideal crossbars without and with the nonideal-effect correction show the rate of 85.3% and 88.1%, respectively, compared to the ideal crossbar achieving the rate as large as 88.9%.

A Robust Memristor Based on Epitaxial Vertically Aligned Nanostructured BaTiO3−CeO2 Films on Silicon

“…The higher identification rate of the device is attributed to the good linearity of the BTO−CeO 2 device (see Figure S16, Supporting Information, for device modeling). In terms of neural network performance, we conduct some comparisons with other work [ 39,40 ] and conclude that our device has excellent performance.…”

Quantization, training, parasitic resistance correction, and programming techniques of memristor-crossbar neural networks for edge intelligence

“…The neuron voltages in figure 10 can be affected by R N and R W along the crossbar columns in the same way that the source voltages are degraded. V N,1 is a neuron voltage from column #1 that is amplified with R C,1 and R 2 to compensate for the neuron voltage degradation (Nguyen et al 2021b).…”

Transient Response and Firing Behaviors of Memristive Neuron Circuit

“…It needs a large stimulus current to generate spiking and bursting phenomena in a neuron. The crossbar array of the 1T1M structure (Nguyen et al, 2021 ) is combined with CMOS to implement the M-COMS hybrid neuron circuit. Its wide memristance range is the same as that in the memristor-based neuron circuit.…”