Memory Architecture of 3D Vertical Gate (3DVG) NAND Flash Using Plural Island-Gate SSL Decoding Method and Study of it's Program Inhibit Characteristics

Chang, Kai‐Chun; Lue, Hang-Ting; Chen, Chih‐Ping; Chen, Chieh-Fang; Chen, Yanru; Hsiao, Yi‐Hsuan; Hsieh, Chih-Chang; Shih, Yung‐Feng; Yang, Tahone; Chen, Kuang-Chao; Hung, Chun-Hsiung; Lu, Chih‐Yuan

doi:10.1109/imw.2012.6213641

Cited by 4 publications

(1 citation statement)

References 2 publications

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“…As the demand for high-density storage grows rapidly, three-dimensionl (3D) memory stacking is gaining more and more attention because it has great advantages in increasing the integration density and decreasing the cost [1,2]. Among a couple of architectures developed to realize the 3D memory stacking, the vertical channel structure has been considered as one of most promising candidates due to its scalability and good stacking capability [3][4][5]. For harsh environment applications such as spacial space, previous work has presented the unfavorable influence of total ionizing dose (TID) irradiation and single-event effect (SEE) on the conventional planar device, with the hole trapped in the isolation oxide and the collected charges dominating the radiation response [6,7].…”

Section: Introductionmentioning

confidence: 99%

Total ionizing dose and single-event effect in vertical channel double-gate nMOSFETs

Tan¹,

An²,

Xue³

et al. 2013

Semicond. Sci. Technol.

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In this paper, the total ionizing dose (TID) and single-event effect (SEE) in vertical channel double-gate (DG) nMOSFETs are comprehensively investigated. Due to the vertical channel structure and the excellent gate control capability, the vertical channel DG transistor is relatively resistant to TID and transient ionization effect. However, the dc characteristics of vertical channel DG device are very sensitive to permanent damage induced by a few ions hitting the device. The on-state current and transconductance of the vertical channel DG MOSFETs show significant degradation after exposure to heavy ions, which is attributed to the formation of displacement damage in the channel. As the device feature size scales down to the deca-nanometer regime, the influence of permanent damage induced by a few ions striking the device static performance cannot be ignored and should be seriously considered in radiation-hardened technologies.

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Section: Introductionmentioning

confidence: 99%

Total ionizing dose and single-event effect in vertical channel double-gate nMOSFETs

Tan¹,

An²,

Xue³

et al. 2013

Semicond. Sci. Technol.

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Highly-Ordered 3D Vertical Resistive Switching Memory Arrays with Ultralow Power Consumption and Ultrahigh Density

Al‐Haddad

Wang

et al. 2016

ACS Appl. Mater. Interfaces

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Resistive switching random access memories (RRAM) have attracted great scientific and industrial attention for next generation data storage because of their advantages of nonvolatile properties, high density, low power consumption, fast writing/erasing speed, good endurance, and simple and small operation system. Here, by using a template-assisted technique, we demonstrate a three-dimensional highly ordered vertical RRAM device array with density as high as that of the nanopores of the template (10(8)-10(9) cm(-2)), which can also be fabricated in large area. The high crystallinity of the materials, the large contact area and the intimate semiconductor/electrode interface (3 nm interfacial layer) make the ultralow voltage operation (millivolt magnitude) and ultralow power consumption (picowatt) possible. Our procedure for fabrication of the nanodevice arrays in large area can be used for producing many other different materials and such three-dimensional electronic device arrays with the capability to adjust the device densities can be extended to other applications of the next generation nanodevice technology.

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Disturbance Relaxation for 3D Flash Memory

Chang¹,

Chang

Kuo

et al. 2016

IEEE Trans. Comput.

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Memory Architecture of 3D Vertical Gate (3DVG) NAND Flash Using Plural Island-Gate SSL Decoding Method and Study of it's Program Inhibit Characteristics

Cited by 4 publications

References 2 publications

Total ionizing dose and single-event effect in vertical channel double-gate nMOSFETs

Total ionizing dose and single-event effect in vertical channel double-gate nMOSFETs

Highly-Ordered 3D Vertical Resistive Switching Memory Arrays with Ultralow Power Consumption and Ultrahigh Density

Disturbance Relaxation for 3D Flash Memory

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