Memory and Storage System Design with Nonvolatile Memory Technologies

Zhao, Jishen; Xu, Cong; Chi, Ping; Xie, Yuan

doi:10.2197/ipsjtsldm.8.2

Cited by 11 publications

(6 citation statements)

References 58 publications

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“…As per the recent survey, eNVM devices called FeFET, PCM, STTRAM and RRAM are the most assured memory devices that can be used for high-efficient performance with low cost and power. Likewise, Jishen Zhao et al reviewed the low-cost architecture of non-volatile memory, byte-addressed non-volatile memory (NVM) architectures, including spin-transfer torque memory (STTMRAM), phase-change memory (PCM) and resistive memory (ReRAM), as just a substitute for conventional memory systems used throughout the memory models [27].…”

Section: Related Workmentioning

confidence: 99%

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A Novel Workload-Aware and Optimized Write Cycles in NVRAM

Tharanyaa¹,

Sharmila²,

Kumar³

2022

Computers, Materials &Amp; Continua

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With the emergence of the Internet of things (IoT), embedded systems have now changed its dimensionality and it is applied in various domains such as healthcare, home automation and mainly Industry 4.0. These Embedded IoT devices are mostly battery-driven. It has been analyzed that usage of Dynamic Random-Access Memory (DRAM) centered core memory is considered the most significant source of high energy utility in Embedded IoT devices. For achieving the low power consumption in these devices, Non-volatile memory (NVM) devices such as Parameter Random Access Memory (PRAM) and Spin-Transfer Torque Magnetic Random-Access Memory (STT-RAM) are becoming popular among main memory alternatives in embedded IoT devices because of their features such as high thickness, byte addressability, high scalability and low power intake. Additionally, Non-volatile Random-Access Memory (NVRAM) is widely adopted to save the data in the embedded IoT devices. NVM, flash memories have a limited lifetime, so it is mandatory to adopt intelligent optimization in managing the NVRAM-based embedded devices using an intelligent controller while considering the endurance issue. To address this challenge, the paper proposes a powerful, lightweight machine learning-based workload-adaptive write schemes of the NVRAM, which can increase the lifetime and reduce the energy consumption of the processors. The proposed system consists of three phases like Workload Characterization, Intelligent Compression and Memory Allocators. These phases are used for distributing the write-cycles to NVRAM, following the energy-time consumption and number of data bytes. The extensive experimentations are carried out using the IoMT (Internet of Medical things) benchmark in which the different endurance factors such as application delay, energy and write-time factors were evaluated and compared with the different existing algorithms.

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Section: Related Workmentioning

confidence: 99%

“…NVM, Characteristics and Drawbacks unlike conventional charge-based memory such as DRAM and SRAM, evolving NVMs store information using series resistance memories with increased concentration and scalability. Therefore, NVMs can be commonly used in the primary memory [27].…”

Section: Nvram Backgroundmentioning

confidence: 99%

A Novel Workload-Aware and Optimized Write Cycles in NVRAM

Tharanyaa¹,

Sharmila²,

Kumar³

2022

Computers, Materials &Amp; Continua

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“…In addition, for the read operations, no sensing voltage is required to read the V OUT because the logic states of the NAND LIM are stored as V OUT . The NAND and NOR LIMs are compared in Table 1 with existing charge-or resistance-based memory technologies reported by other research groups in terms of the read/write time, voltage, LIM computation energy/latency, leakage power, and retention [10][11][12][13][14] .…”

Section: Nand and Nor Lim Operation Under Dynamic Conditionsmentioning

confidence: 99%

“…Resistance-based memory includes resistive RAM (RRAM), spin-transfer torque magnetoresistive RAM (STT-MRAM), and phase-change memory (PCM). The read/write time, voltage, LIM computation energy/latency, leakage power, and retention for existing charge-or resistance-based memory, as reported in other studies, are listed in Table 1 [10][11][12][13][14] . In charge-based memory, although SRAM is very fast (~1 ns) and DRAM has high density, they contain volatile memory devices, and hence have high energy needs.…”

Section: Introductionmentioning

confidence: 99%

NAND And NOR Logic-In-Memory Comprising Silicon Nanowire Feedback Field-Effect Transistors

Yang¹,

Jeon²,

Son³

et al. 2021

Preprint

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The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindrance, logic-in-memory (LIM) has been proposed that performs both data processing and memory operations. Here, we present a NAND and NOR LIM composed of silicon nanowidre feedback field-effect transistors, whose configuration resembles that of CMOS logic gate circuits. The LIM can perform memory operations to retain its output logic under zero-bias conditions as well as logic operations with a high processing speed of nanoseconds. The newly proposed dynamic voltage-transfer characteristics verify the operating principle of the LIM. This study demonstrates that the NAND and NOR LIM has promising potential to resolve power and processing speed issues.

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“…Although the working mechanisms and the features vary, all of the emerging NVMs (i.e., MRAM, PCM, and ReRAM) share common basics [29]: They all use cell resistance (RH or RL) to represent logic "0" or "1". Typically, the NVM storage cell is built with the 1T1R (one access transistor with one resistive cell) structure, where it has a wordline (WL) controlling the access transistor, a bitline (BL) for data sensing, and a source line (SL) to provide the write current/voltage.…”

Section: Introductionmentioning

confidence: 99%

NVSim-CAM

Liu

et al. 2016

Proceedings of the 35th International Conference on Computer-Aided Design

Self Cite

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Ternary Content-Addressable Memory (TCAM) is widely used in networking routers, fully associative caches, search engines, etc. While the conventional SRAM-based TCAM suffers from the poor scalability, the emerging nonvolatile memories (NVM, i.e., MRAM, PCM, and ReRAM) bring evolution for the TCAM design. It effectively reduces the cell size, and makes significant energy reduction and scalability improvement. New applications such as associative processors/accelerators are facilitated by the emergence of the nonvolatile TCAM (nvTCAM). However, nvTCAM design is challenging. In addition to the emerging device's uncertainty, the nvTCAM cell structure is so diverse that it results in a design space too large to explore manually. To tackle these challenges, we propose a circuit-level model and develop a simulation tool, NVSim-CAM, which helps researchers to make early design decisions, and to evaluate device/circuit innovations. The tool is validated by HSPICE simulations and data from fabricated chips. We also present a case study to illustrate how NVSim-CAM benefits the nvTCAM design. In the case study, we propose a novel 3D vertical ReRAM based TCAM cell, the 3DvTCAM. We project the advantages/disadvantages and explore the design space for the proposed cell with NVSim-CAM.

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Memory and Storage System Design with Nonvolatile Memory Technologies

Cited by 11 publications

References 58 publications

A Novel Workload-Aware and Optimized Write Cycles in NVRAM

A Novel Workload-Aware and Optimized Write Cycles in NVRAM

NAND And NOR Logic-In-Memory Comprising Silicon Nanowire Feedback Field-Effect Transistors

NVSim-CAM

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