Mechanisms of current flow in metal-semiconductor ohmic contacts

Blank, Tanya; Goldberg, Yu. A.

doi:10.1134/s1063782607110012

Cited by 178 publications

(125 citation statements)

References 272 publications

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“…The following anomaly was registered: in the temperature range starting from room temperature the contact resistance increases with increasing temperature T. In particular, such temperature dependence of the contact resistance was observed for In-n-GaP and In-n-GaN contacts. [1][2][3] The increase of contact resistance with temperature was also observed for ohmic contacts to p-and n-InP. 4 The authors of Ref.…”

Section: Introductionmentioning

confidence: 99%

Mechanism of contact resistance formation in ohmic contacts with high dislocation density

Sachenko

Belyaev

Болтовец

et al. 2012

Journal of Applied Physics

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Source/drain electrodes contact effect on the stability of bottom-contact pentacene field-effect transistors AIP Advances 2, 022113 (2012) All-metallic lateral spin valves using Co2Fe(Ge0.5Ga0.5) Heusler alloy with a large spin signal Appl. Phys. Lett. 100, 052405 (2012) Contact transport of focused ion beam-deposited Pt to Si nanowires: From measurement to understanding Appl. Phys. Lett. 100, 053503 (2012) Ab initio quantum transport simulation of silicide-silicon contacts J. Appl. Phys. 111, 014305 (2012) Impact of fluorine treatment on Fermi level depinning for metal/germanium Schottky junctions Appl. Phys. Lett. 99, 253504 (2011) Additional information on J. Appl. Phys. A new mechanism of contact resistance formation in ohmic contacts with high dislocation density is proposed. Its specific feature is the appearance of a characteristic region where the contact resistance increases with temperature. According to the mechanism revealed, the current flowing through the metal shunts associated with dislocations is determined by electron diffusion. It is shown that current flows through the semiconductor near-surface regions where electrons accumulate. A feature of the mechanism is the realization of ohmic contact irrespective of the relation between the contact and bulk resistances. The theory is proved for contacts formed to III-V semiconductor materials as well as silicon-based materials. A reasonable agreement between theory and experimental results is obtained.

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Section: Introductionmentioning

confidence: 99%

Mechanism of contact resistance formation in ohmic contacts with high dislocation density

Sachenko

Belyaev

Болтовец

et al. 2012

Journal of Applied Physics

View full text Add to dashboard Cite

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“…The extracted value ρ C is on the first sight substantially higher than for stateof-the-art metal ohmic contacts to highly doped SiC 40 . However, by further CTLM measurements on highly nitrogen (N)-doped 6H SiC material (nitrogen concentration [N] = 10 19 cm − 3 ), we could verify that additional contact doping can improve ρ C by orders of magnitude: contact resistances of ρ C = 6 µΩcm 2 were reached, which are well competitive with state-of-the-art ohmic contacts on SiC 41 (we currently run an extensive study on this item). There is an analogy to state-of-the-art metal ohmic contacts to SiC, where carbon is considered as an important mediator for transparent interfaces 42 .…”

Section: Device Concept and Implementationmentioning

confidence: 81%

Tailoring the graphene/silicon carbide interface for monolithic wafer-scale electronics

et al. 2012

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Graphene is an outstanding electronic material, predicted to have a role in post-silicon electronics. However, owing to the absence of an electronic bandgap, graphene switching devices with high on/off ratio are still lacking. Here in the search for a comprehensive concept for wafer-scale graphene electronics, we present a monolithic transistor that uses the entire material system epitaxial graphene on silicon carbide (0001). This system consists of the graphene layer with its vanishing energy gap, the underlying semiconductor and their common interface. The graphene/semiconductor interfaces are tailor-made for ohmic as well as for schottky contacts side-by-side on the same chip. We demonstrate normally on and normally off operation of a single transistor with on/off ratios exceeding 10 4 and no damping at megahertz frequencies. In its simplest realization, the fabrication process requires only one lithography step to build transistors, diodes, resistors and eventually integrated circuits without the need of metallic interconnects.

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“…Considering the 3C-SiC layer used in this study was grown on Si thus contains a large amount of defects, they may have helped towards a lower contact resistance. However, the 'metal shunts' requires the dissolution and recrystallization of semiconductor in metal, namely additional heat treatment [14]. We believe the as-deposited Ohmic contacts were obtained more likely by the formation of an impurity band caused by the excessive doping.…”

Section: A Non-annealed Ohmic Contacts To 3c-sicmentioning

confidence: 99%