2012
DOI: 10.1016/j.mee.2011.10.015
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Measurement of mechanical stresses induced by hybrid shallow-trench-isolation for dynamic random access memory using recess channel array transistor structure

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Cited by 6 publications
(4 citation statements)
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“…Each line was obtained by finding ϕ f that resulted in straight lines. 21) N d was calculated using the values of γ (inset, Fig. 2).…”
Section: Resultsmentioning
confidence: 99%
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“…Each line was obtained by finding ϕ f that resulted in straight lines. 21) N d was calculated using the values of γ (inset, Fig. 2).…”
Section: Resultsmentioning
confidence: 99%
“…N d decreased as L decreased, which might indicate that the mechanical stress varied with L; because a difference in mechanical stress can produce a difference in N d between MOSFETs fabricated using the same process. 21) The drain-body junction current at a high V db differs from ideal diode current because of a voltage drop in the quasi-neutral region with the series resistance R s . The junction voltage V j is given by V j = V db − I db R s and R s is given by…”
Section: Resultsmentioning
confidence: 99%
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“…26) For electrical isolation between the active regions of neighboring complementary metal-oxide semiconductor devices, a hybrid shallow trench isolation (STI) with a mixture of the high-density-plasma chemical-vapor-deposition STI and spin-on-glass STI was used. 27,28) A SiGe channel with a Si capping layer was formed by treatment with dilute HF. Then to form a gate dielectric that has a double stack structure, IL was first formed by thermal oxidation.…”
Section: Experimental Methodsmentioning
confidence: 99%