Measurement and application of vertical inductors in high‐speed broadband circuit

Abstract

The measurement results and a practical application of vertical inductors (VIs) are presented. VIs are on-chip inductors designed to save chip area. In VI the spiral plane is oriented perpendicularly with respect to the substrate. An inductance of 318 pH with a self-resonance frequency of 66.5 GHz is implemented in a 130 nm bipolar complementary metal-oxide semiconductor (BiCMOS) technology and results are compared with three-dimensional (3D) planar EM (ground-signal-ground) simulations. The inductance per unit area is 424 nH/mm 2 , more than 1.7 times higher than other simulated spiral horizontal inductors. Moreover, VIs have been applied in the design of a broadband amplifier leading to a 25% bandwidth enhancement.

Ultra compact multi-standard low-noise amplifiers in 28 nm CMOS with inductive peaking

“…Another idea to design inductors with low size are vertical inductors. The implementation of these inductors is described in [15, 16]. The turns are not planar to the substrate plane but run across the metal stack.…”

Integrated Circuits for 3D Photonic Transceivers

“…Moreover, inductive peaking is often realized using an inductor in series with a resistor. In this case the low Q-factor is not a problem and can be easily compensated by changing the resistor in series to the inductor [3]. In [3] vertical inductors are manufactured in a 130 nm SiGe BiCMOS technology.…”

“…In this case the low Q-factor is not a problem and can be easily compensated by changing the resistor in series to the inductor [3]. In [3] vertical inductors are manufactured in a 130 nm SiGe BiCMOS technology. The measurement results are compared with simulations shown in Fig.…”

“…In [3] the vertical inductor is also compared with conventional inductors resulting in a higher inductance per unit of area. Vertical inductors can also be extended to a 3D chip stack.…”

“…It has been shown that SiGe BiCMOS IC technology can achieve a well-balanced performance to meet most of the requirements described above [1]. Furthermore, novel vertical inductor structures, which can be used for inductive peaking for instance, have been proposed to enable more compact chips [2,3].…”