Materials growth for InAs high electron mobility transistors and circuits

Abstract

Articles you may be interested inMolecular beam epitaxy growth of high electron mobility InAs/AlSb deep quantum well structure J. Appl. Phys. 114, 013704 (2013); 10.1063/1.4811443 Molecular beam epitaxial growth of metamorphic AlInSb/GaInSb high-electron-mobility-transistor structures on GaAs substrates for low power and high frequency applications J. Appl. Phys. 109, 033706 (2011); 10.1063/1.3544041Suppression of surface segregation of silicon dopants during molecular beam epitaxy of ( 411 ) A In 0.75 Ga 0.25 As ∕ In 0.52 Al 0.48 As pseudomorphic high electron mobility transistor structures Study of highly selective wet gate recess process for Al 0.25 Ga 0.75 As/GaAs based pseudomorphic high electron mobility transistors Comparison of As-and P-based metamorphic buffers for high performance InP heterojunction bipolar transistor and high electron mobility transistor applications High electron mobility transistors ͑HEMTs͒ with InAs channels and antimonide barriers were grown by molecular beam epitaxy. Both Si and Te were successfully employed as n-type dopants. Sheet resistances of 90-150 ⍀/ᮀ were routinely achieved on a variety of heterostructures with nonuniformities as low as 1.5% across a 75 mm wafer. X-ray diffraction measurements show that the InAs channels are in tension, coherently strained to the Al͑Ga͒Sb buffer layers. Atomic force microscopy measurements demonstrate that the surfaces are relatively smooth, with rms roughness of 8 -26 Å over a 5ϫ5 m 2 area. These results demonstrate that the growth of InAs HEMTs has progressed to the point that the fabrication of circuits should be feasible.

InAlSb/InAs/AlGaSb Quantum Well Heterostructures for High-Electron-Mobility Transistors

“…Both the AlGaSb and InAlSb layers provide a large conduction band offset with respect to the InAs, allowing good confinement of electrons. A significant difference between this structure and our earlier HEMTs 18,19 is that the InAlSb upper barrier replaces InAlAs and AlSb. 20 One reason for this change was to avoid the use of pure AlSb, because Miya et al showed that replacing 20-40% of the Al with Ga in AlGaAsSb greatly reduces oxidation.…”

“…The value of x = 0.68 was chosen because it is in reasonable agreement with our nominal value of 0.70 from MBE reflection highenergy electron diffraction (RHEED) oscillation calibrations and because the corresponding relaxation value is close to what we have found in the past for pure AlSb layers of similar thicknesses on GaAs. 18 If R > 0 is assumed for the In y Al 1-y Sb layer, then larger values of y are required and are not consistent with our nominal value. For the InAs layer, the experimental peak position can also be matched for R = 0% if 2% Sb cross-contamination is assumed.…”

“…The growth process was similar to that used for InAs/AlSb transistor structures in the past; more details are given elsewhere. 18 Table I includes a summary of all the samples grown for this study. Hall/van der Pauw transport measurements were made on 5 · 5 mm 2 squares at room temperature and 0.37 T. Results were confirmed at 1.0 T for selected samples.…”

Evolution of pyramid morphology during InAs(001) homoepitaxy

“…Previous reports on the growth of InAs layer at higher temperatures 465-510°C close to ͑2 ϫ 4͒ to ͑4 ϫ 2͒ transition is known for its higher mobility and have shown promising device performances. 7,25 However the growths beyond 510°C for particular As-pressure taken up in this study, falls in the bistable region displays pyramid morphology. Meanwhile retaining a smallest interface roughness during the growth of InAs channel at high temperatures, by adjusting the V/III ratio have demonstrated some highest mobility upto 32 000 cm 2 / V s, which is significant for device applications.…”

“…Among the various III-V compound semiconductors, InAs is attracted for long-wavelength, high carrier mobility, 7 high speed, and high frequency applications. 8 Epitaxial thin films for post complementary metal-oxide-semiconductor digital integrated circuits 9 and high performance spin devices [10][11][12] require the surfaces to be atomically smooth with low defect densities in critical conditions.…”