2004
DOI: 10.1557/proc-810-c1.1
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Materials Challenges for CMOS Junctions

Abstract: Against a backdrop of the latest ITRS predictions for CMOS junctions, we compare methods for dopant introduction and activation, methods for making contact to these regions, and methods for measurement of material and device properties. As activation without diffusion (sub-melt laser, capacitor discharge flash, or solid phase epitaxy) becomes more feasible, the burden on Xj, Rsh and abruptness falls on the implanters, and the process margin appears slim, opening the door for other methods of doping. For contac… Show more

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Cited by 6 publications
(3 citation statements)
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References 8 publications
(6 reference statements)
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“…1 shows a comparison between a 15 nm thick ErSix layer obtained on Si bulk (top) and its 12 nm counterpart on SOI (bottom). Starting from a bulk substrate, rectangular shaped penetrating pits with [110]/ [1][2][3][4][5][6][7][8][9][10] oriented sides is due on inhomogeneous nucleation and lateral Si atoms out diffusion. As presented below, the origin of the pinholes come from localized islands of epitaxial RESi 2-x nuclei which are oriented with the (100) substrate.…”
Section: Defects Formationmentioning
confidence: 99%
See 1 more Smart Citation
“…1 shows a comparison between a 15 nm thick ErSix layer obtained on Si bulk (top) and its 12 nm counterpart on SOI (bottom). Starting from a bulk substrate, rectangular shaped penetrating pits with [110]/ [1][2][3][4][5][6][7][8][9][10] oriented sides is due on inhomogeneous nucleation and lateral Si atoms out diffusion. As presented below, the origin of the pinholes come from localized islands of epitaxial RESi 2-x nuclei which are oriented with the (100) substrate.…”
Section: Defects Formationmentioning
confidence: 99%
“…As CMOS technology is entering in the decananometre era, the contact resistance associated to the silicide/silicon interface is identified as one of the biggest challenge to solve in order to preserve current drive capabilities. In that context, source/drain (S/D) engineering takes an increasing importance in the development of leading edge CMOS generations because of the increasing impact of S/D series resistances on transistor performance (1). In order to further pursue down-scaling of MOSFETs in the sub-32 nm range of gate lengths, novel devices that hierarchically combine alternative materials as well new substrate concepts such as silicon on insulator (SOI) substrate or strained substrate have been proposed.…”
Section: Introductionmentioning
confidence: 99%
“…28 The approach has been labeled infusion doping. Commercial systems for GCIB have been configured that produce Ar-and B-containing molecular clusters from sources such as B 2 H 6 and BF 3 .…”
Section: Infusion Dopingmentioning
confidence: 99%