MASE: a novel infrastructure for detailed microarchitectural modeling

Abstract

MASE (Micro Architectural Simulation Environment) is a novel infrastructure that provides a flexible and capable environment to model modern microarchitectures. Many popular simulators, such as SimpleScalar, are predominately trace-based where the performance simulator is driven by a trace of instructions read from a file or generated on-the-fly by a functional simulator. Trace-driven simulators are well-suited for oracle studies and provide a clean division between performance modeling and functional emulation. A major problem with this approach, however, is that it does not accurately model timing dependent computations, an increasing trend in microarchitecture designs such as those found in multiprocessor systems. MASE implements a micro-functional performance model that combines timing and functional components into a single core. In addition, MASE incorporates a trace-driven functional component used to implement oracle studies and check the results of instructions as they commit. The check feature reduces the burden of correctness on the micro-functional core and also serves as a powerful debugging aid. MASE also implements a callback scheduling interface to support resources with non-deterministic latencies such as those found in highly concurrent memory systems. MASE was built on top of the current version of SimpleScalar. Analyses show that the performance statistics are comparable without a significant increase in simulation time. IntroductionComputer system simulation is a vital technology in the modern computer system design cycle. The flexibility to quickly update software simulation models speeds the evaluation of design changes, permitting architects to explore large portions of the design space. Software modeling infrastructure also decouples hardware and software design efforts so that software development may proceed in parallel with actual hardware design, thereby reducing time to market for products with hardware and software components.A microprocessor performance model is a software representation of a hardware design. It tracks the timing of instructions and data through the processor pipeline and memory system. Very detailed performance models may also include I/O device models such as disks and network interfaces. It is important for the performance model to be closely matched to the hardware that is being emulated. An inaccurate model can lead to incorrect or misleading research results [6]. Figure 1 illustrates a trace-driven modeling infrastructure 1 , the most prevalent simulator organization. The performance model is driven by an instruction trace that represents the dynamic stream of instructions executed for a specific processor architecture and workload. Traces are either read from a file [22], created through the use of instrumented hardware [1], or generated on-the-fly by emulating a program [14]. SimEric Larson larsone@eecs.umich.edu Saugata Chatterjee saugatac@eecs.umich.edu Todd Austin austin@umich.edu 1. We use a broad definition of trace-based simulation. We consid...

Hardware compilation of application-specific memory-access interconnect

“…For this comparison, we used MASE [42] to obtain simulation results for the superscalar core. The ASICs synthesized by CASH use a [180-nm/2-V] CMOS standard-cell technology.…”

Effective support of simulation in computer architecture instruction

“…MASE simplifies this process by adding a dynamic checker that can detect implementation errors, modularizing the code base improving code readability and understanding, and adding support for optimizations that are difficult to implement. Additional information on MASE can be found in [7].…”

Modulo Path History for the Reduction of Pipeline Overheads in Path-based Neural Branch Predictors

“…Our applications were compiled on an Alpha 21264 with Compaq cc with full optimizations. For our IPC simulations, we used the MASE simulator from SimpleScalar 4.0[23].…”