Mapping Spiking Neural Networks to Neuromorphic Hardware

Balaji, Adarsha; Catthoor, Francky; Das, Anup; Wu, Yuefeng; Huynh, Khanh; Dell'Anna, Francesco; Indiveri, Giacomo; Krichmar, Jeffrey L.; Dutt, Nikil; Schaafsma, Siebren

doi:10.1109/tvlsi.2019.2951493

Cited by 111 publications

(118 citation statements)

References 64 publications

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“…Recently, diferent approaches have been proposed for clustering SNNs. Examples include SpiNeMap [14] for energy minimization and NEUTRAMS [63] for performance. See Section 9 for a comprehensive overview of other state-of-the-art SNN clustering approaches.…”

Section: Workload Clusteringmentioning

confidence: 99%

DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware

Song

Chong

Balaji

et al. 2022

ACM Trans. Embed. Comput. Syst.

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Spiking Neural Networks (SNN) are an emerging computation model, which uses event-driven activation and bio-inspired learning algorithms. SNN-based machine-learning programs are typically executed on tile-based neuromorphic hardware platforms, where each tile consists of a computation unit called crossbar, which maps neurons and synapses of the program. However, synthesizing such programs on an off-the-shelf neuromorphic hardware is challenging. This is because of the inherent resource and latency limitations of the hardware, which impact both model performance, e.g., accuracy, and hardware performance, e.g., throughput. We propose DFSynthesizer, an end-to-end framework for synthesizing SNN-based machine learning programs to neuromorphic hardware. The proposed framework works in four steps. First, it analyzes a machine-learning program and generates SNN workload using representative data. Second, it partitions the SNN workload and generates clusters that fit on crossbars of the target neuromorphic hardware. Third, it exploits the rich semantics of Synchronous Dataflow Graph (SDFG) to represent a clustered SNN program, allowing for performance analysis in terms of key hardware constraints such as number of crossbars, dimension of each crossbar, buffer space on tiles, and tile communication bandwidth. Finally, it uses a novel scheduling algorithm to execute clusters on crossbars of the hardware, guaranteeing hardware performance. We evaluate DFSynthesizer with 10 commonly used machine-learning programs. Our results demonstrate that DFSynthesizer provides much tighter performance guarantee compared to current mapping approaches.

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Section: Workload Clusteringmentioning

confidence: 99%

DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware

Song

Chong

Balaji

et al. 2022

ACM Trans. Embed. Comput. Syst.

Self Cite

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“…However, it has been demonstrated that the size of a crossbar directly affects the power consumption of a neuromorphic system [28], [29]. This limitation has been observed in neuromorphic systems that employed single large crossbars [30]. Therefore, for a scalable neuromorphic system that supports large SNN with massive number of synapses, a partitioning and mapping of its synapses into smaller local crossbars which are linked using a shared interconnect is a better approach.…”

Section: A Background and Motivationmentioning

confidence: 99%

On the Design of a Fault-Tolerant Scalable Three Dimensional NoC-Based Digital Neuromorphic System With On-Chip Learning

2021

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Neuromorphic systems have shown improvements over the years, leveraging Spiking neural networks (SNN) event-driven nature to demonstrate low power consumption. As neuromorphic systems require high integration to form a functional silicon brain-like, moving to 3D integrated circuits (3D-ICs) with three-dimensional network on chip (3D-NoC) interconnect is a suitable approach that allows scalable design, shorter connections, and lower power consumption. However, highly dense neuromorphic systems also encounter the reliability issue where a single point of failure can affect the systems'operation. Because neuromorphic systems rely heavily on spike communication, an interruption or violation in the timing of spike communication can adversely affect the performance and accuracy of a neuromorphic system. This paper presents NASH, a a fault-tolerant 3D-NoC based neuromorphic system that incorporates as processing elements, lightweight spiking neuron processing cores (SNPCs) with spike-timing-dependent-plasticity (STDP) on-chip learning. Each SNPC houses 256 leaky integrate-and-fire (LIF) neurons and 65k synapses. Evaluation results on MNIST classification, using the fault-tolerant shortest-path K-means-based multicast routing algorithm (FTSP-KMCR), show that the NASH system can maintain high accuracy for up to 30% permanent fault in the interconnect with an acceptable area and power overheads when compared to other existing systems.

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“…The use of real equipment and electrodes can implement very large and deep networks, where the number of spikes can be huge, so sorting them is a very important problem [4]. Balaji et al [2] presented an alternative way of mapping neural networks to neuromorphic hardware. In their paper, the result was compared with other, existing solutions proposed approach reduce average energy consumption and delay time.…”

Section: Introductionmentioning

confidence: 99%

A heuristic approach to the hyperparameters in training spiking neural networks using spike-timing-dependent plasticity

Połap

Woźniak

Hołubowski

et al. 2021

Neural Comput & Applic

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The third type of neural network called spiking is developed due to a more accurate representation of neuronal activity in living organisms. Spiking neural networks have many different parameters that can be difficult to adjust manually to the current classification problem. The analysis and selection of coefficients’ values in the network can be analyzed as an optimization problem. A practical method for automatic selection of them can decrease the time needed to develop such a model. In this paper, we propose the use of a heuristic approach to analyze and select coefficients with the idea of collaborative working. The proposed idea is based on parallel analyzing of different coefficients and choosing the best of them or average ones. This type of optimization problem allows the selection of all variables, which can significantly affect the convergence of the accuracy. Our proposal was tested using network simulators and popular databases to indicate the possibilities of the described approach. Five different heuristic algorithms were tested and the best results were reached by Cuckoo Search Algorithm, Grasshopper Optimization Algorithm, and Polar Bears Algorithm.

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Mapping Spiking Neural Networks to Neuromorphic Hardware

Cited by 111 publications

References 64 publications

DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware

DFSynthesizer: Dataflow-based Synthesis of Spiking Neural Networks to Neuromorphic Hardware

On the Design of a Fault-Tolerant Scalable Three Dimensional NoC-Based Digital Neuromorphic System With On-Chip Learning

A heuristic approach to the hyperparameters in training spiking neural networks using spike-timing-dependent plasticity

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