Mapping of generalized template matching onto reconfigurable computers

Liang, Xuejun; Jean, Jack

doi:10.1109/tvlsi.2003.812306

Cited by 20 publications

(1 citation statement)

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“…Its computational cost is high, but it can be accelerated by hardware because of its inherent parallelism. Many template matching systems using FPGA have been proposed [4], [5], [6], [8], and rotated patterns around the z axis are detected in [7], though the cross-correlation is calculated in the frequency space (it is influenced by the change of the brightness).…”

Section: Introductionmentioning

confidence: 99%

Detecting Patterns in Various Size and Angle Using FPGA

Suzuki

Yoshifumi

Matsumoto

2010

2010 International Conference on Field Programmable Logic and Applications

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In this paper, we describe an approach for detecting patterns in various size and angle using FPGA. In many approaches, features of a given pattern which are invariant to scaling and/or rotation are defined in advance, and those features are searched in a given image. These approaches make it possible to narrow down the candidate regions with less computational cost, but the sensitivity depends on how to define the features. In our approach, the image is downscaled by α k and α l along the x and y axes (k, l = 0, 1, 2, ..., n), and the regions in the downscaled images are compared with several sequences of the templates which are generated from the given pattern using direct cross-correlation. This approach requires high computational cost, but by calculating the cross-correlations incrementally starting from the nonrotated pattern, it becomes possible to detect the rotated patterns in various size and angle with one FPGA.

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