Manufacturing of 3D multifunctional microelectronic devices: challenges and opportunities

Abstract

Sophisticated three-dimensional (3D) forms are expected to be one of the significant development trends in nextgeneration microelectronics because of their capabilities of rendering substantially enhanced performances, a high degree of integration, and novel functionalities. To date, a diversity of manufacturing methods has been developed for 3D microelectronic devices with different structural and functional features. Most of these methods fall into two categories, i.e., micromanufacturing technologies and mechanically guided 3D assembly approaches. From this perspective, we review the different manufacturing methods and their specific features as well as their limitations. At present, there is still no universal method that can deterministically form 3D microelectronic devices with very high geometric complexity and nanoscale precision. We offer an outlook on future developments in the manufacturing of 3D multifunctional microelectronics devices and provide some perspectives on the remaining challenges as well as possible solutions. Mechanically guided 3D assembly based on compressive buckling is proposed as a versatile platform that can be merged with micromanufacturing technologies and/or other assembly methods to provide access to microelectronic devices with more types of integrated functions and highly increased densities of functional components.

Island Effect in Stretchable Inorganic Electronics

“…The buffer layer strategy can also be extended to the islandbridge systems consisting of 3D helical interconnects formed by the mechanically guided assembly techniques (see Figure 6a), as reported in recent years. [69][70][71][72][73][74][75][76][77][78][79][80][81] 3D helical interconnects have shown superior performances in compliance as well as stretchability. [18,61,82] However, in some application scenarios such as when brittle functional materials (e.g., highly doped silicon for thermoelectric coils [26,27] ) with ultra-low fracture strain apply, the compliance of the helical interconnect is severely restricted and therefore needs to be optimized.…”

Reprogrammable and Reconfigurable Photonic Molecular Logic Gates Based on Ln3+ Ions

“…[ 6 ] Despite the central role played by silicon‐based devices in computing history, [ 7 ] it is nowadays accepted that bottom‐up technology may contribute to the development of new materials at the molecular scale exploiting atoms and molecules as computing building blocks. [ 8,9 ] Besides the obvious gain in integration, the route toward molecular computing can be environmentally friendly with reduced production costs, compared to the current silicon technology. [ 10 ]…”

“…[6] Despite the central role played by silicon-based devices in computing history, [7] it is nowadays accepted that bottom-up technology may contribute to the development of new materials at the molecular scale exploiting atoms and molecules as computing building blocks. [8,9] Besides the obvious gain in integration, the route toward molecular computing can be environmentally friendly with reduced production costs, compared to the current silicon technology. [10] The concept of atom-by-atom assembling to create molecules resembling traditional electronic components is not new [11] and has gained relevance since 1974 with the seminal paper of Ratner et al on a molecular rectifier using a single organic molecule.…”

Hydrophobic Metal−Organic Frameworks and Derived Composites for Microelectronics Applications

“…In microelectronics, insulating materials that can be used to generate high-density and high-speed integrated circuits for enhancing performance, are typically required to separate the conducting parts from each other and sustain the mechanical structures of chips. [1][2][3][4][5][6] Various types of porous materials including silica and zeolite type frameworks, [7,8] fluorinated carbons, [9][10][11] organic polymers, [12,13] etc., currently dominate the field of interlayer dielectrics in microelectronic chip devices; however, their relatively low dielectric constant, brittleness, thermal stability and large static power dissipation limit their practical applications. [7][8][9][10][11][12][13] The International Technology Roadmap for Semiconductors (ITRS) has suggested that desirable materials for promoting novel low k-dielectrics should have the capability of forming a crystalline structure, have a high elastic modulus (> 3 GPa), reduced pore size (< 5 nm), hydrophobicity and a high chemical and thermal stability.…”