Managing hardware power saving modes for high performance computing

Minartz, Timo; Ludwig, Thomas; Knobloch, Michael; Mohr, Bernd

doi:10.1109/igcc.2011.6008581

Cited by 14 publications

(9 citation statements)

References 20 publications

(22 reference statements)

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“…However, the per device sampling has the advantage of more detailed information; for example, the time delay when switching device states can be visualized. In Figure 4 the mode of devices has been manually switched using a daemon (introduced in [3]) displayed as CPU MODE, DISK MODE and NIC MODE. The corresponding state as reported from the hardware is sampled as DISK STATE and NIC STATE (see the upper 5 timelines, the CPU STATE is not shown here in detail as already discussed in Figures 2 and 3).…”

Section: B Exemplary Visualizationmentioning

confidence: 99%

“…In addition to these static approaches, new dynamic approaches have been developed to change the frequency of processors using hardware counters [18]- [20] or to change device modes by the application itself [3].…”

Section: Related Workmentioning

confidence: 99%

“…Further, the measurement of the hardware allows for evaluating various kinds of software approaches based on their power consumption and energy (e.g. optimization of libraries and applications [1]- [3]). …”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Tracing and Visualization of Energy-Related Metrics

Minartz

Kunkel

Ludwig

2012

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops &Amp; PhD Forum

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In an effort to reduce the energy consumption of high-performance computing centers, a number of new approaches have been developed in the last few years. One of these approaches is to switch hardware to lower power states in phases of device idleness or low utilization. Even if the concepts are already quite clear, tools to identify these phases in applications and to determine impact on performance and power consumption are still missing. In this paper, we investigate the tracing of energy-related metrics into our existing tracing environment in an effort to correlate them with the application. We implement tracing of performance and sleep states of the processor, the disk and the network device states in addition to the node power consumption. The exemplary energy efficiency analysis visually correlates the application with the energy-related metrics. With this correlation, it is possible to identify and further avoid waiting times caused by mode switches initiated by the user or the system.

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Section: B Exemplary Visualizationmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

See 1 more Smart Citation

Tracing and Visualization of Energy-Related Metrics

Minartz

Kunkel

Ludwig

2012

2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops &Amp; PhD Forum

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“…To control the hardware power-states efficiently we have developed a node-local daemon process called eeDaemon ( [2]). For simplicity, the daemon manages three power-states per component on the node -maximum for full utilization, medium for normal utilization and minimum for low utilization or idle periods.…”

Section: Hardware Managementmentioning

confidence: 99%

Electronic poster

Knobloch

Minartz

Molka

et al. 2011

Proceedings of the 2011 Companion on High Performance Computing Networking, Storage and Analysis Companion

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Energy-efficiency and power consumption of applications has become a major topic in High Performance Computing in the last years. This poster presents the work of the last two years in the eeClust project 1 . The aim of the project is to reduce the energy consumption of applications on commodity HPC clusters with as little performance impact as possible by an integrated approach of application analysis, efficient management of hardware power-states and monitoring of the clusters power consumption. We outline the overall project plan and present the generation and analysis of traces on application side as well as the hardware management and monitoring on system side in detail. We further introduce eeMark, a benchmark for computational performance and energy efficiency which is especially tailored for HPC systems. Project PlanThe approach of the eeClust project ([3]) is to switch hardware components to a lower power-state in phases where the component is not fully utilized. To identify these phases we extend well-known performance analysis tools which many application developers are familiar with. This keeps the 1 .learning curve relatively flat. We have developed an Application Programming Interface (API) to instrument the application, which communicates the future hardware requirements of the application to a daemon process (called eeDaemon), which then manages the hardware power-states accordingly.To test and validate our approach we procured a powermanageable cluster with 10 nodes (5 nodes Intel Nehalem and 5 nodes AMD Opteron), attached to 3 ZES LMG450 power-meters 2 which allow very accurate measurements at a high frequency. Tracing & AnalysisWe extended two well-known and wildly deployed performance analysis toolsets for trace file analysis. The first is VampirTrace 3 and Vampir 4 from the Center for Information Services and High Performance Computing of TU Dresden, which allow a manual analysis by timeline visualization of program behaviour, e.g. function calls or messages sent, and hardware counter values, together with statistical details of the program execution. The other toolset is Scalasca 5 , developed at Juelich Supercomputing Centre and the German Research School for Simulation Science in Aachen, which performs an automatic trace file analysis to detect patterns that indicate performance problems, especially wait-states, i.e. situations where one process has to wait for one (ore more) another process(es) because of workload imbalances.We developed a VampirTrace Plugin ([5]) to display the power consumption of the cluster nodes as a counter timeline in Vampir. This enables us to correlate the power consumption to program activity and hardware counter values. 2

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“…They can also be retrieved for the whole applications or for phases of applications after a precharacterization process [11], [6], or using a code instrumentation and/or analysis [14], [10], [21], [4]. Application phases can be obtained and used at runtime within a modified code linked to an ad-hoc library [20], [18] or without the need to adapt the application [8], [27], [15]. In these approaches one setting is valid for the duration of one phase.…”

Section: State Of the Artmentioning

confidence: 99%